diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-07-19 09:19:59 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-26 21:12:39 +0000 |
| commit | 7d964aed3b3694a611fdb00f3b37d6ce91cb9cb0 (patch) | |
| tree | 78cfd602c142de7e6d7468dd8e8459d0df76b232 /src/northbridge | |
| parent | ffa58cfc1267bbc977c70fa7607520d35366de6d (diff) | |
nb/intel/haswell: Use macro for dimm->bus_width
Change-Id: Ice91a20470c107f7db0ac83301488ae5afed5a8b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43584
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/haswell/raminit.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c index 8cd9e77aee..5d67954125 100644 --- a/src/northbridge/intel/haswell/raminit.c +++ b/src/northbridge/intel/haswell/raminit.c @@ -215,7 +215,7 @@ void setup_sdram_meminfo(struct pei_data *pei_data) (pei_data->spd_data[dimm_cnt][SPD_DIMM_MOD_ID2] << 8) | (pei_data->spd_data[dimm_cnt][SPD_DIMM_MOD_ID1] & 0xff); dimm->mod_type = SPD_SODIMM; - dimm->bus_width = 0x3; /* 64-bit */ + dimm->bus_width = MEMORY_BUS_WIDTH_64; dimm_cnt++; } } |