summaryrefslogtreecommitdiff
path: root/src/northbridge
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2022-11-15 14:00:22 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-11-17 13:34:24 +0000
commitac435b4b911212598ce70092ce5c67a21a9f1111 (patch)
treef944ac62cae2af7666c6b27dce7c708cdf6e28f6 /src/northbridge
parent8d14633dfb21b6789814e1c3ca6700d4be7e50b6 (diff)
intel/haswell,lynxpoint: Fix out() parameter order
Change-Id: Ife134ef6d508113e3cd27b6352ee5044aee43744 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69677 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/gma.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c
index e1b8b73097..6e6948b70f 100644
--- a/src/northbridge/intel/haswell/gma.c
+++ b/src/northbridge/intel/haswell/gma.c
@@ -408,7 +408,7 @@ static void gma_enable_swsci(void)
/* Clear DMISCI status */
reg16 = inw(get_pmbase() + TCO1_STS);
reg16 &= DMISCI_STS;
- outw(get_pmbase() + TCO1_STS, reg16);
+ outw(reg16, get_pmbase() + TCO1_STS);
/* Clear and enable ACPI TCO SCI */
enable_tco_sci();