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authorGabe Black <gabeblack@google.com>2013-10-08 23:16:51 -0700
committerMarc Jones <marc.jones@se-eng.com>2014-08-29 06:43:14 +0200
commitd81f409514b99189c943d06fa9a8fa01d8178fc8 (patch)
treec6a5c0030be2ea27816877be22d150130658887e /src/northbridge/intel
parentf09f2247d7584975d17a7d4755b279c1c3f6f001 (diff)
exynos: Fix the name of the chip_operations structures.
The exynos directories had been moved from src/cpu to src/soc, but the name of the chip_operations structure wasn't updated properly. That meant that the SOCs never installed their memory resources and the ram stage would fail to load the payload. Change-Id: Ib60489b6d3434e3ebd13827a804452f762747f1b Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/172400 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit 9100d475ebcc4dae23184583a6cc0162577e70d1) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6781 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/northbridge/intel')
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