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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-11-18 00:43:14 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2008-11-18 00:43:14 +0000
commit8c0702b89b2e71f29f828c54c67f2f6bff89d5c1 (patch)
tree55eb8ba429c13148cd1fd92fa6c789b69ea7ac66 /src/northbridge/intel
parent7cb70d9abd5423182b95c815d50ad1979519a5f4 (diff)
Currently flashrom assumes every vendor BIOS shares our view about which
SPI opcodes should be placed in which location. Move to a less optimistic implementation and actually use the generic SPI read functions. They're useful for abstracting exactly this stuff and that makes them the preferred choice. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3758 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/northbridge/intel')
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