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authorDamien Zammit <damien@zamaudio.com>2016-09-05 02:32:40 +1000
committerMartin Roth <martinroth@google.com>2016-09-07 19:06:05 +0200
commit523e90f9c7b749b6a6131557df88e8e645f98aa8 (patch)
treeb5e119f5ba4a00dcce81d8a5ba56a9977e909188 /src/northbridge/intel
parent57321db3ca6de23e9b33738bb232d587b1b38ac1 (diff)
nb/intel/x4x: Increase MMIO PCI space to 2GiB
This is necessary for PCI express graphics card add-ons, otherwise the pci allocator cannot fit the mmio for the add on card into the space it has available and the OS turns off the card. Old value was 1GiB. Change-Id: I606994501b15e636fe209d1ed4b3d3f73b42bf5c Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/16494 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/x4x/raminit_ddr2.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c
index 352e71c1e4..cd5b3b2817 100644
--- a/src/northbridge/intel/x4x/raminit_ddr2.c
+++ b/src/northbridge/intel/x4x/raminit_ddr2.c
@@ -1633,7 +1633,7 @@ static void mmap_ddr2(struct sysinfo *s)
gfxsize = ggc2uma[(ggc & 0xf0) >> 4];
gttsize = ggc2gtt[(ggc & 0xf00) >> 8];
tsegsize = 1; // 1MB TSEG
- mmiosize = 0x400; // 1GB MMIO
+ mmiosize = 0x800; // 2GB MMIO
tom = s->channel_capacity[0] + s->channel_capacity[1] - ME_UMA_SIZEMB;
tolud = MIN(0x1000 - mmiosize, tom);