diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-02 18:00:29 +0200 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-04 15:08:03 +0000 |
commit | 065857ee7fd61b05025d7a803e82f2b9b53cbc9a (patch) | |
tree | 3016bedfeac37b6aca649f1474f6343228ae9673 /src/northbridge/intel/i945 | |
parent | bdaec07a859c0c05e7fd5276a15b3933da574368 (diff) |
arch/io.h: Drop unnecessary include
Change-Id: I91158452680586ac676ea11c8589062880a31f91
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31692
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/i945')
-rw-r--r-- | src/northbridge/intel/i945/bootblock.c | 1 | ||||
-rw-r--r-- | src/northbridge/intel/i945/debug.c | 1 | ||||
-rw-r--r-- | src/northbridge/intel/i945/northbridge.c | 1 | ||||
-rw-r--r-- | src/northbridge/intel/i945/ram_calc.c | 1 | ||||
-rw-r--r-- | src/northbridge/intel/i945/stage_cache.c | 1 |
5 files changed, 0 insertions, 5 deletions
diff --git a/src/northbridge/intel/i945/bootblock.c b/src/northbridge/intel/i945/bootblock.c index 1c00e8bebf..604088b1f3 100644 --- a/src/northbridge/intel/i945/bootblock.c +++ b/src/northbridge/intel/i945/bootblock.c @@ -11,7 +11,6 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <device/pci_ops.h> /* Just re-define this instead of including i945.h. It blows up romcc. */ diff --git a/src/northbridge/intel/i945/debug.c b/src/northbridge/intel/i945/debug.c index 370131fb51..2acbc57f3c 100644 --- a/src/northbridge/intel/i945/debug.c +++ b/src/northbridge/intel/i945/debug.c @@ -15,7 +15,6 @@ */ #include <spd.h> -#include <arch/io.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <console/console.h> diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 1dff3d14dd..ce7d292a27 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -15,7 +15,6 @@ #include <cbmem.h> #include <console/console.h> -#include <arch/io.h> #include <device/pci_ops.h> #include <stdint.h> #include <device/device.h> diff --git a/src/northbridge/intel/i945/ram_calc.c b/src/northbridge/intel/i945/ram_calc.c index c797d42f09..124a6a8317 100644 --- a/src/northbridge/intel/i945/ram_calc.c +++ b/src/northbridge/intel/i945/ram_calc.c @@ -16,7 +16,6 @@ // Use simple device model for this file even in ramstage #define __SIMPLE_DEVICE__ -#include <arch/io.h> #include <device/pci_ops.h> #include <arch/cpu.h> #include <cbmem.h> diff --git a/src/northbridge/intel/i945/stage_cache.c b/src/northbridge/intel/i945/stage_cache.c index 26d4e7e5a6..b659796ea8 100644 --- a/src/northbridge/intel/i945/stage_cache.c +++ b/src/northbridge/intel/i945/stage_cache.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <cbmem.h> #include <device/pci.h> #include <stage_cache.h> |