diff options
| author | Lijian Zhao <lijian.zhao@intel.com> | 2018-12-12 11:19:46 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-19 05:19:33 +0000 |
| commit | ae75400ae338180da9a75526b017042a1780c4f9 (patch) | |
| tree | 5470fb90ec87c86a7a1df3479229abe83e52af83 /src/northbridge/intel/gm45 | |
| parent | 4e21dee863ed5622b83a6461c00c8911b608d323 (diff) | |
soc/intel/cannonlake: Add Acoustic features
Expose the following FSP UPD interface into coreboot, which is the
following:
AcousticNoiseMitigation
FastPkgCRampDisableIa
FastPkgCRampDisableGt
FastPkgCRampDisableSa
FastPkgCRampDisableFivr
SlowSlewRateForIa
SlowSlewRateForGt
SlowSlewRateForSa
SlowSlewRateForFivr
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Change-Id: I21f53c594a085794474e87eb6781b51db88d0c10
Reviewed-on: https://review.coreboot.org/c/30207
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Diffstat (limited to 'src/northbridge/intel/gm45')
0 files changed, 0 insertions, 0 deletions