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authorFelix Held <felix-coreboot@felixheld.de>2021-06-11 18:00:02 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-06-14 14:52:48 +0000
commit78b0e7f0821ebb2ac0d616aa626f90352e231612 (patch)
tree0e44e5a6a6f9ba31e3689002061234673e6eb49d /src/northbridge/intel/common
parent34bd6ba97917b0bc54bb1f1e106a56b5c03e19ac (diff)
soc/amd/common/pi/agesawrapper: use IOAPIC ID defines
Part of the soc/amd/stoneyridge code already uses the FCH_IOAPIC_ID and GNB_IOAPIC_ID defines. Use those defines in the remaining location to make sure that the IOAPIC IDs are always consistent between the hardware register, the MADT and the IVRS ACPI tables. TEST=Timeless build of amd/gardenia results in identical binary. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I410a6560de66889b153c8a66b8dc5474ac114ba7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55429 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/northbridge/intel/common')
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