diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2024-08-31 10:27:34 +0200 |
|---|---|---|
| committer | Elyes Haouas <ehaouas@noos.fr> | 2024-09-01 04:58:14 +0000 |
| commit | f3d54feef4c700991dd11b012f810162c5b6b06a (patch) | |
| tree | 0ed0b4604abd9b51344f16848e216c518c356c27 /src/mainboard | |
| parent | e68c6542fef9827913cff8d237006aeb1de45c0b (diff) | |
tree: Use eist_enable as bool for newly merged files
Change-Id: Icc01852dc5bd04cfa151e8fa7c5bcc160ed978c6
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84156
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
| -rw-r--r-- | src/mainboard/protectli/vault_adl_p/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb | 2 | ||||
| -rw-r--r-- | src/mainboard/system76/mtl/devicetree.cb | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mainboard/protectli/vault_adl_p/devicetree.cb b/src/mainboard/protectli/vault_adl_p/devicetree.cb index f11dc6aba2..0089a5fb46 100644 --- a/src/mainboard/protectli/vault_adl_p/devicetree.cb +++ b/src/mainboard/protectli/vault_adl_p/devicetree.cb @@ -1,7 +1,7 @@ chip soc/intel/alderlake # FSP configuration - register "eist_enable" = "1" + register "eist_enable" = "true" # Sagv Configuration register "sagv" = "SaGv_Enabled" diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb index 145dbc22c5..5a6424ec14 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb @@ -13,7 +13,7 @@ chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" # FSP Silicon - register "eist_enable" = "1" + register "eist_enable" = "true" register "cnvi_bt_core" = "true" register "cnvi_bt_audio_offload" = "true" diff --git a/src/mainboard/system76/mtl/devicetree.cb b/src/mainboard/system76/mtl/devicetree.cb index 9a4cfb4215..0bd6721808 100644 --- a/src/mainboard/system76/mtl/devicetree.cb +++ b/src/mainboard/system76/mtl/devicetree.cb @@ -11,7 +11,7 @@ chip soc/intel/meteorlake }" # Enable Enhanced Intel SpeedStep - register "eist_enable" = "1" + register "eist_enable" = "true" # Thermal register "tcc_offset" = "8" |