diff options
author | Angel Pons <th3fanbus@gmail.com> | 2023-01-12 15:51:17 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-01-13 17:15:24 +0000 |
commit | 9ed576fbcd919b12c0592a0111a28f9142367a1d (patch) | |
tree | 6f215937ed060cebc29262fe5002ecf8fd66aecc /src/mainboard | |
parent | 419a2a75df59236251cbfd168e007e43f078fdb0 (diff) |
mb/lenovo/t520: Also disable PCI bridge on W520
As per Kendo3-WS schematics, the conventional PCI bridge is not used.
Change-Id: Ic3aa11cc3a3028c31b06ad8f74875db8c5626a89
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71856
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/lenovo/t520/devicetree.cb | 2 | ||||
-rw-r--r-- | src/mainboard/lenovo/t520/variants/t520/overridetree.cb | 1 |
2 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index 9588af27c2..5048c698d7 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -70,7 +70,7 @@ chip northbridge/intel/sandybridge device pci 1c.6 off end # PCIe Port #7 device pci 1c.7 off end # PCIe Port #8 device pci 1d.0 on end # USB2 EHCI #1 - + device pci 1e.0 off end # PCI-2-PCI bridge device pci 1f.0 on #LPC bridge chip ec/lenovo/pmh7 device pnp ff.1 on end # dummy diff --git a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb index cba2b7da30..407e02d907 100644 --- a/src/mainboard/lenovo/t520/variants/t520/overridetree.cb +++ b/src/mainboard/lenovo/t520/variants/t520/overridetree.cb @@ -1,7 +1,6 @@ chip northbridge/intel/sandybridge device domain 0 on chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH - device pci 1e.0 off end # PCI-2-PCI bridge device pci 1f.0 on # LPC bridge chip ec/lenovo/h8 device pnp ff.2 on end # dummy |