lenovo/g505s: remove the unused and not present devices

Remove the devices unused or not present on this laptop.

Signed-off-by: Mike Banon <mikebdp2@gmail.com>
Change-Id: I0decad499dfbb5f1e0a189d21f0fca47c80bd490
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47913
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

2 files changed, 0 insertions, 183 deletions

diff --git a/src/mainboard/lenovo/g505s/acpi/routing.asl b/src/mainboard/lenovo/g505s/acpi/routing.asl
index bf6a881405..6f91672106 100644
--- a/src/mainboard/lenovo/g505s/acpi/routing.asl
+++ b/src/mainboard/lenovo/g505s/acpi/routing.asl
@@ -19,12 +19,6 @@
 		Package(){0x0002FFFF, 2, INTA, 0 },
 		Package(){0x0002FFFF, 3, INTB, 0 },
 
-		/* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
-		Package(){0x0003FFFF, 0, INTD, 0 },
-		Package(){0x0003FFFF, 1, INTA, 0 },
-		Package(){0x0003FFFF, 2, INTB, 0 },
-		Package(){0x0003FFFF, 3, INTC, 0 },
-
 		/* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
 		Package(){0x0004FFFF, 0, INTA, 0 },
 		Package(){0x0004FFFF, 1, INTB, 0 },
@@ -37,20 +31,6 @@
 		Package(){0x0005FFFF, 2, INTD, 0 },
 		Package(){0x0005FFFF, 3, INTA, 0 },
 
-		/* Bus 0, Dev 6 - PCIe Bridge for Ethernet Chip */
-		Package(){0x0006FFFF, 0, INTC, 0 },
-		Package(){0x0006FFFF, 1, INTD, 0 },
-		Package(){0x0006FFFF, 2, INTA, 0 },
-		Package(){0x0006FFFF, 3, INTB, 0 },
-
-		/* Bus 0, Dev 7 - PCIe Bridge for x1 PCIe Slot */
-		Package(){0x0007FFFF, 0, INTD, 0 },
-		Package(){0x0007FFFF, 1, INTA, 0 },
-		Package(){0x0007FFFF, 2, INTB, 0 },
-		Package(){0x0007FFFF, 3, INTC, 0 },
-
-		/* Bus 0, Dev 8 - Southbridge port (normally hidden) */
-
 		/* Bus 0, Dev 20 - F0:SMBus/ACPI,F1:IDE;F2:HDAudio;F3:LPC;F4:PCIBridge;F5:USB */
 		Package(){0x0014FFFF, 0, INTA, 0 },
 		Package(){0x0014FFFF, 1, INTB, 0 },
@@ -75,12 +55,6 @@
 
 		/* Bus 0, Dev 17 - SATA controller */
 		Package(){0x0011FFFF, 0, INTD, 0 },
-
-		/* Bus 0, Dev 21 PCIe Bridge */
-		Package(){0x0015FFFF, 0, INTA, 0 },
-		Package(){0x0015FFFF, 1, INTB, 0 },
-		Package(){0x0015FFFF, 2, INTC, 0 },
-		Package(){0x0015FFFF, 3, INTD, 0 },
 	})
 
 	Name(APR0, Package(){
@@ -97,12 +71,6 @@
 		Package(){0x0002FFFF, 2, 0, 16 },
 		Package(){0x0002FFFF, 3, 0, 17 },
 
-		/* Bus 0, Dev 3 - PCIe graphics port 1 bridge */
-		Package(){0x0003FFFF, 0, 0, 19 },
-		Package(){0x0003FFFF, 1, 0, 16 },
-		Package(){0x0003FFFF, 2, 0, 17 },
-		Package(){0x0003FFFF, 3, 0, 18 },
-
 		/* Bus 0, Dev 4 - PCIe Bridge for Express Card Slot */
 		Package(){0x0004FFFF, 0, 0, 16 },
 		Package(){0x0004FFFF, 1, 0, 17 },
@@ -115,20 +83,6 @@
 		Package(){0x0005FFFF, 2, 0, 19 },
 		Package(){0x0005FFFF, 3, 0, 16 },
 
-		/* Bus 0, Dev 6 - General purpose PCIe bridge 6 */
-		Package(){0x0006FFFF, 0, 0, 18 },
-		Package(){0x0006FFFF, 1, 0, 19 },
-		Package(){0x0006FFFF, 2, 0, 16 },
-		Package(){0x0006FFFF, 3, 0, 17 },
-
-		/* Bus 0, Dev 7 - PCIe Bridge for network card */
-		Package(){0x0007FFFF, 0, 0, 19 },
-		Package(){0x0007FFFF, 1, 0, 16 },
-		Package(){0x0007FFFF, 2, 0, 17 },
-		Package(){0x0007FFFF, 3, 0, 18 },
-
-		/* Bus 0, Dev 8 - Southbridge port (normally hidden) */
-
 		/* Bus 0, Dev 20 - F0:SMBus/ACPI, F1:IDE; F2:HDAudio; F3:LPC; F4:PCIBridge; F5:USB */
 		Package(){0x0014FFFF, 0, 0, 16 },
 		Package(){0x0014FFFF, 1, 0, 17 },
@@ -153,12 +107,6 @@
 
 		/* Bus 0, Dev 17 - SATA controller */
 		Package(){0x0011FFFF, 0, 0, 19 },
-
-		/* Bus0, Dev 21 PCIE Bridge */
-		Package(){0x0015FFFF, 0, 0, 16 },
-		Package(){0x0015FFFF, 1, 0, 17 },
-		Package(){0x0015FFFF, 2, 0, 18 },
-		Package(){0x0015FFFF, 3, 0, 19 },
 	})
 
 	Name(PS2, Package(){
@@ -205,107 +153,13 @@
 		Package(){0x0000FFFF, 2, 0, 19 },
 		Package(){0x0000FFFF, 3, 0, 16 },
 	})
-
 	Name(PS6, Package(){
-		/* PCIe slot - Hooked to PCIe slot 6 */
-		Package(){0x0000FFFF, 0, INTC, 0 },
-		Package(){0x0000FFFF, 1, INTD, 0 },
-		Package(){0x0000FFFF, 2, INTA, 0 },
-		Package(){0x0000FFFF, 3, INTB, 0 },
 	})
 	Name(APS6, Package(){
-		/* PCIe slot - Hooked to PCIe slot 6 */
-		Package(){0x0000FFFF, 0, 0, 18 },
-		Package(){0x0000FFFF, 1, 0, 19 },
-		Package(){0x0000FFFF, 2, 0, 16 },
-		Package(){0x0000FFFF, 3, 0, 17 },
 	})
-
 	Name(PS7, Package(){
-		/* The onboard Ethernet chip - Dev 7 Parmer Hooked to RTK8111E Ethernet Card x1 Device7-GPP3 J16B*/
-		Package(){0x0000FFFF, 0, INTD, 0 },
-		Package(){0x0000FFFF, 1, INTA, 0 },
-		Package(){0x0000FFFF, 2, INTB, 0 },
-		Package(){0x0000FFFF, 3, INTC, 0 },
 	})
 	Name(APS7, Package(){
-		/* The onboard Ethernet chip - Dev 7 Parmer Hooked to RTK8111E Ethernet Card x1 Device7-GPP3 J16B*/
-		Package(){0x0000FFFF, 0, 0, 19 },
-		Package(){0x0000FFFF, 1, 0, 16 },
-		Package(){0x0000FFFF, 2, 0, 17 },
-		Package(){0x0000FFFF, 3, 0, 18 },
-	})
-
-	Name(PE0, Package(){
-		/* PCIe slot - Hooked to PCIe Bridge 0*/
-		Package(){0x0000FFFF, 0, INTA, 0 },
-		Package(){0x0000FFFF, 1, INTB, 0 },
-		Package(){0x0000FFFF, 2, INTC, 0 },
-		Package(){0x0000FFFF, 3, INTD, 0 },
-	})
-	Name(APE0, Package(){
-		/* PCIe slot - Hooked to PCIe Bridge 0*/
-		Package(){0x0000FFFF, 0, 0, 16 },
-		Package(){0x0000FFFF, 1, 0, 17 },
-		Package(){0x0000FFFF, 2, 0, 18 },
-		Package(){0x0000FFFF, 3, 0, 19 },
-	})
-
-	Name(PE1, Package(){
-		/* PCIe slot - Hooked to PCIe Bridge 1*/
-		Package(){0x0000FFFF, 0, INTB, 0 },
-		Package(){0x0000FFFF, 1, INTC, 0 },
-		Package(){0x0000FFFF, 2, INTD, 0 },
-		Package(){0x0000FFFF, 3, INTA, 0 },
 	})
-	Name(APE1, Package(){
-		/* PCIe slot - Hooked to PCIe Bridge 1*/
-		Package(){0x0000FFFF, 0, 0, 17 },
-		Package(){0x0000FFFF, 1, 0, 18 },
-		Package(){0x0000FFFF, 2, 0, 19 },
-		Package(){0x0000FFFF, 3, 0, 16 },
-	})
-
-	Name(PE2, Package(){
-		/* PCIe slot - Hooked to PCIe Bridge 2*/
-		Package(){0x0000FFFF, 0, INTC, 0 },
-		Package(){0x0000FFFF, 1, INTD, 0 },
-		Package(){0x0000FFFF, 2, INTA, 0 },
-		Package(){0x0000FFFF, 3, INTB, 0 },
-	})
-	Name(APE2, Package(){
-		/* PCIe slot - Hooked to PCIe Bridge 2*/
-		Package(){0x0000FFFF, 0, 0, 18 },
-		Package(){0x0000FFFF, 1, 0, 19 },
-		Package(){0x0000FFFF, 2, 0, 16 },
-		Package(){0x0000FFFF, 3, 0, 17 },
-	})
-
-	Name(PE3, Package(){
-		/* PCIe slot - Hooked to PCIe Bridge 3 */
-		Package(){0x0000FFFF, 0, INTD, 0 },
-		Package(){0x0000FFFF, 1, INTA, 0 },
-		Package(){0x0000FFFF, 2, INTB, 0 },
-		Package(){0x0000FFFF, 3, INTC, 0 },
-	})
-	Name(APE3, Package(){
-		/* PCIe slot - Hooked to PCIe Bridge 3*/
-		Package(){0x0000FFFF, 0, 0, 19 },
-		Package(){0x0000FFFF, 1, 0, 16 },
-		Package(){0x0000FFFF, 2, 0, 17 },
-		Package(){0x0000FFFF, 3, 0, 18 },
-	})
-
-	/* SB PCI Bridge J21, J22 */
 	Name(PCIB, Package(){
-		/* PCI slots: slot 0, slot 1, slot 2 behind Dev14, Fun4. */
-		Package(){0x0005FFFF, 0, 0, 0x14 },
-		Package(){0x0005FFFF, 1, 0, 0x15 },
-		Package(){0x0005FFFF, 2, 0, 0x16 },
-		Package(){0x0005FFFF, 3, 0, 0x17 },
-
-		Package(){0x0006FFFF, 0, 0, 0x15 },
-		Package(){0x0006FFFF, 1, 0, 0x16 },
-		Package(){0x0006FFFF, 2, 0, 0x17 },
-		Package(){0x0006FFFF, 3, 0, 0x14 },
 	})
diff --git a/src/mainboard/lenovo/g505s/mptable.c b/src/mainboard/lenovo/g505s/mptable.c
index bc1759a5c1..5d8eb4d3aa 100644
--- a/src/mainboard/lenovo/g505s/mptable.c
+++ b/src/mainboard/lenovo/g505s/mptable.c
@@ -124,43 +124,6 @@ static void *smp_write_config_table(void *v)
 	PCI_INT(0x0, 0x11, 0x0, intr_data[0x40]);
 	PCI_INT(0x0, 0x11, 0x0, intr_data[0x41]);
 
-	/* on board NIC & Slot PCIE. */
-
-	/* PCI slots */
-	struct device *dev = pcidev_on_root(0x14, 4);
-	if (dev && dev->enabled) {
-		u8 bus_pci = dev->link_list->secondary;
-		/* PCI_SLOT 0. */
-		PCI_INT(bus_pci, 0x5, 0x0, 0x14);
-		PCI_INT(bus_pci, 0x5, 0x1, 0x15);
-		PCI_INT(bus_pci, 0x5, 0x2, 0x16);
-		PCI_INT(bus_pci, 0x5, 0x3, 0x17);
-
-		/* PCI_SLOT 1. */
-		PCI_INT(bus_pci, 0x6, 0x0, 0x15);
-		PCI_INT(bus_pci, 0x6, 0x1, 0x16);
-		PCI_INT(bus_pci, 0x6, 0x2, 0x17);
-		PCI_INT(bus_pci, 0x6, 0x3, 0x14);
-
-		/* PCI_SLOT 2. */
-		PCI_INT(bus_pci, 0x7, 0x0, 0x16);
-		PCI_INT(bus_pci, 0x7, 0x1, 0x17);
-		PCI_INT(bus_pci, 0x7, 0x2, 0x14);
-		PCI_INT(bus_pci, 0x7, 0x3, 0x15);
-	}
-
-	/* PCIe Lan*/
-	PCI_INT(0x0, 0x06, 0x0, 0x13);
-
-	/* FCH PCIe PortA */
-	PCI_INT(0x0, 0x15, 0x0, 0x10);
-	/* FCH PCIe PortB */
-	PCI_INT(0x0, 0x15, 0x1, 0x11);
-	/* FCH PCIe PortC */
-	PCI_INT(0x0, 0x15, 0x2, 0x12);
-	/* FCH PCIe PortD */
-	PCI_INT(0x0, 0x15, 0x3, 0x13);
-
 	/*Local Ints:   Type    Polarity    Trigger     Bus ID   IRQ    APIC ID PIN# */
 	IO_LOCAL_INT(mp_ExtINT, 0, MP_APIC_ALL, 0x0);
 	IO_LOCAL_INT(mp_NMI, 0, MP_APIC_ALL, 0x1);