diff options
author | Tony Huang <tony-huang@quanta.corp-partner.google.com> | 2024-05-10 08:14:19 +0800 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2024-05-12 18:55:47 +0000 |
commit | 83fd2d8a284c77bcb87007e62c4658b264983ff8 (patch) | |
tree | e3dbb0158d8be57a2eaff75f35b40f3c90cda813 /src/mainboard | |
parent | 0fc69141e523ef3dba5ce840dea68de40b0ec785 (diff) |
mb/google/rex/var/deku: Correct FVM Itrip for GT VR domain
Previous CL misspelling VR domain to IA not GT which cause
FVM Itrip(GT) not set correctly.
This CL corrects it to VR_DOMIAN_GT and confirm FVM Itrip(GT)
has set to 54.
BUG=b:320410462
BRANCH=firmware-rex-15709.B
TEST= FSP debug emerge-ovis coreboot intel-mtlfsp
check overrides setting
IccLimit[1] = 216 ( 1/4 A)
Change-Id: I99df053869aa11b7c82aa0b7f7ec0acf73467a76
Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82268
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Derek Huang <derekhuang@google.com>
Diffstat (limited to 'src/mainboard')
-rw-r--r-- | src/mainboard/google/rex/variants/deku/overridetree.cb | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb index d1a9563ecf..775dbc7066 100644 --- a/src/mainboard/google/rex/variants/deku/overridetree.cb +++ b/src/mainboard/google/rex/variants/deku/overridetree.cb @@ -60,7 +60,7 @@ chip soc/intel/meteorlake # The ICC Limit is represented in 1/4 A increments, i.e., a value of 400 = 100A # For GT VR configuration register "enable_fast_vmode[VR_DOMAIN_GT]" = "1" - register "cep_enable[VR_DOMAIN_IA]" = "1" + register "cep_enable[VR_DOMAIN_GT]" = "1" register "fast_vmode_i_trip[VR_DOMAIN_GT]" = "216" # 54A # For SA VR configuration register "enable_fast_vmode[VR_DOMAIN_SA]" = "1" |