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authorRoger Wang <roger2.wang@lcfc.corp-partner.google.com>2024-08-07 10:16:43 +0800
committerFelix Held <felix-coreboot@felixheld.de>2024-08-19 13:22:28 +0000
commit82c0dd29099fc89826e332d2720f7e7e60f77f0e (patch)
treed9be153e7a6dcf9a76ca335de59e06fac48ec5ca /src/mainboard
parentefad423f8472c1b9c130842e3d92625500f82d5d (diff)
mb/google/nissa/var/sundance: Adjust WWAN GPIO sequence
This patch removes WWAN configuration from the bootblock. It appears that setting it up in the bootblock may not be necessary. Configure in bootblock,the seq will be triggered at the same time. The customer would like us to leave some buffer for EN to RST. BUG=b:357764679 TEST=Build and verified test result by EE team Change-Id: I2c0e789c0bec293f4bca711e53644d62f4f83551 Signed-off-by: Roger Wang <roger2.wang@lcfc.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83792 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Dinesh Gehlot <digehlot@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/google/brya/variants/sundance/gpio.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/google/brya/variants/sundance/gpio.c b/src/mainboard/google/brya/variants/sundance/gpio.c
index bd36f054dd..107fa77e73 100644
--- a/src/mainboard/google/brya/variants/sundance/gpio.c
+++ b/src/mainboard/google/brya/variants/sundance/gpio.c
@@ -66,8 +66,6 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_GPO(GPP_D6, 0, DEEP),
/* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
- /* F12 : WWAN_RST_L */
- PAD_CFG_GPO(GPP_F12, 0, DEEP),
/* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
PAD_CFG_GPI(GPP_F18, NONE, DEEP),
/* H4 : I2C0_SDA ==> SOC_I2C_GSC_SDA */