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authorMyles Watson <mylesgw@gmail.com>2009-11-06 17:02:51 +0000
committerMyles Watson <mylesgw@gmail.com>2009-11-06 17:02:51 +0000
commit1d6d45e3c98e16cbb86915483f771a7bf0e9a633 (patch)
tree38eca17371ca6c9e47b0b403d016eb163327b01b /src/mainboard
parent637309d65e6448d34cc92d44f92a93324c154e79 (diff)
Split the two usages of __ROMCC__:
__ROMCC__ now means "Don't use prototypes, since romcc doesn't support them." __PRE_RAM__ means "Use simpler versions of functions, and no device tree." There are probably some places where both are tested, but only one is needed. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard')
-rw-r--r--src/mainboard/amd/dbm690t/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/amd/pistachio/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah/apc_auto.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/apc_auto.c2
-rw-r--r--src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/arima/hdama/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/asus/a8n_e/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/broadcom/blast/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/dell/s1850/reset.c2
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c2
-rw-r--r--src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/gigabyte/m57sli/apc_auto.c2
-rw-r--r--src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/hp/dl145_g3/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/ibm/e325/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/ibm/e326/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/intel/d945gclf/auto.c8
-rw-r--r--src/mainboard/intel/eagleheights/auto.c2
-rw-r--r--src/mainboard/intel/eagleheights/reset.c2
-rw-r--r--src/mainboard/intel/jarrell/reset.c2
-rw-r--r--src/mainboard/intel/xe7501devkit/auto.c1
-rw-r--r--src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/iwill/dk8s2/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/iwill/dk8x/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/kontron/986lcd-m/auto.c8
-rw-r--r--src/mainboard/kontron/kt690/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/msi/ms7135/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/msi/ms7260/apc_auto.c2
-rw-r--r--src/mainboard/msi/ms7260/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/msi/ms9185/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/msi/ms9282/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/newisys/khepri/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/nvidia/l1_2pvv/apc_auto.c2
-rw-r--r--src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/sunw/ultra40/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/supermicro/h8dme/apc_auto.c2
-rw-r--r--src/mainboard/supermicro/h8dme/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/supermicro/h8dmr/apc_auto.c2
-rw-r--r--src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/apc_auto.c2
-rw-r--r--src/mainboard/supermicro/h8dmr_fam10/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/supermicro/x6dai_g/reset.c2
-rw-r--r--src/mainboard/supermicro/x6dhe_g/reset.c2
-rw-r--r--src/mainboard/supermicro/x6dhe_g2/reset.c2
-rw-r--r--src/mainboard/supermicro/x6dhr_ig/reset.c2
-rw-r--r--src/mainboard/supermicro/x6dhr_ig2/reset.c2
-rw-r--r--src/mainboard/technexion/tim5690/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/technexion/tim8690/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2735/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2850/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2875/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2880/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2881/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2882/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2885/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2891/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2892/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2895/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2895/failover.c2
-rw-r--r--src/mainboard/tyan/s2912/apc_auto.c2
-rw-r--r--src/mainboard/tyan/s2912/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s2912_fam10/apc_auto.c2
-rw-r--r--src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s4880/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/tyan/s4882/cache_as_ram_auto.c2
-rw-r--r--src/mainboard/via/epia-m700/cache_as_ram_auto.c2
69 files changed, 75 insertions, 74 deletions
diff --git a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
index b058b445f3..c83759bbad 100644
--- a/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
+++ b/src/mainboard/amd/dbm690t/cache_as_ram_auto.c
@@ -18,7 +18,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define K8_SET_FIDVID 1
diff --git a/src/mainboard/amd/pistachio/cache_as_ram_auto.c b/src/mainboard/amd/pistachio/cache_as_ram_auto.c
index 4615901fe7..2e5c4a0812 100644
--- a/src/mainboard/amd/pistachio/cache_as_ram_auto.c
+++ b/src/mainboard/amd/pistachio/cache_as_ram_auto.c
@@ -18,7 +18,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define K8_SET_FIDVID 1
diff --git a/src/mainboard/amd/serengeti_cheetah/apc_auto.c b/src/mainboard/amd/serengeti_cheetah/apc_auto.c
index a855c2fd39..6abebffe13 100644
--- a/src/mainboard/amd/serengeti_cheetah/apc_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/apc_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
index a3e2b164a5..2626f8012a 100644
--- a/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/apc_auto.c b/src/mainboard/amd/serengeti_cheetah_fam10/apc_auto.c
index ea7e2a6b29..a62811a228 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/apc_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/apc_auto.c
@@ -18,7 +18,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c b/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
index abb28917c1..0b136ec910 100644
--- a/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/amd/serengeti_cheetah_fam10/cache_as_ram_auto.c
@@ -19,7 +19,7 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define SYSTEM_TYPE 0 /* SERVER */
//#define SYSTEM_TYPE 1 /* DESKTOP */
diff --git a/src/mainboard/arima/hdama/cache_as_ram_auto.c b/src/mainboard/arima/hdama/cache_as_ram_auto.c
index 4bbd4285e7..19c4c6bc3f 100644
--- a/src/mainboard/arima/hdama/cache_as_ram_auto.c
+++ b/src/mainboard/arima/hdama/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <device/pci_def.h>
diff --git a/src/mainboard/asus/a8n_e/cache_as_ram_auto.c b/src/mainboard/asus/a8n_e/cache_as_ram_auto.c
index 021a226427..8e0ba2925e 100644
--- a/src/mainboard/asus/a8n_e/cache_as_ram_auto.c
+++ b/src/mainboard/asus/a8n_e/cache_as_ram_auto.c
@@ -22,7 +22,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
/* Used by it8712f_enable_serial(). */
#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1)
diff --git a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c b/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c
index 6f54ecfcc7..4ec3aee813 100644
--- a/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c
+++ b/src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c
@@ -23,7 +23,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c b/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
index 5a7f74ba37..13101b0217 100644
--- a/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
+++ b/src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c
@@ -23,7 +23,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/broadcom/blast/cache_as_ram_auto.c b/src/mainboard/broadcom/blast/cache_as_ram_auto.c
index 3b94d3fd32..6169841f69 100644
--- a/src/mainboard/broadcom/blast/cache_as_ram_auto.c
+++ b/src/mainboard/broadcom/blast/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/dell/s1850/reset.c b/src/mainboard/dell/s1850/reset.c
index 28a019a7d9..293ad72663 100644
--- a/src/mainboard/dell/s1850/reset.c
+++ b/src/mainboard/dell/s1850/reset.c
@@ -2,7 +2,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#ifndef __ROMCC__
+#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
#include <device/pci.h>
#define PCI_ID(VENDOR_ID, DEVICE_ID) \
((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c b/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c
index 5a94cf740f..452084f7c4 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/apc_auto.c
@@ -22,7 +22,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c b/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
index 056cd08331..69e06bc2e5 100644
--- a/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
+++ b/src/mainboard/gigabyte/ga_2761gxdk/cache_as_ram_auto.c
@@ -22,7 +22,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/gigabyte/m57sli/apc_auto.c b/src/mainboard/gigabyte/m57sli/apc_auto.c
index 50ad68eed3..007dfa9a95 100644
--- a/src/mainboard/gigabyte/m57sli/apc_auto.c
+++ b/src/mainboard/gigabyte/m57sli/apc_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c b/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
index 26e5ee985e..ecc7827428 100644
--- a/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
+++ b/src/mainboard/gigabyte/m57sli/cache_as_ram_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c b/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
index 0f54f46af2..525cb3e102 100644
--- a/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
+++ b/src/mainboard/hp/dl145_g3/cache_as_ram_auto.c
@@ -26,7 +26,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/ibm/e325/cache_as_ram_auto.c b/src/mainboard/ibm/e325/cache_as_ram_auto.c
index 1021a6061e..6621bf1272 100644
--- a/src/mainboard/ibm/e325/cache_as_ram_auto.c
+++ b/src/mainboard/ibm/e325/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/ibm/e326/cache_as_ram_auto.c b/src/mainboard/ibm/e326/cache_as_ram_auto.c
index c6794a9902..0ec2c52f48 100644
--- a/src/mainboard/ibm/e326/cache_as_ram_auto.c
+++ b/src/mainboard/ibm/e326/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/intel/d945gclf/auto.c b/src/mainboard/intel/d945gclf/auto.c
index 890caa00fc..e0c4c52348 100644
--- a/src/mainboard/intel/d945gclf/auto.c
+++ b/src/mainboard/intel/d945gclf/auto.c
@@ -17,8 +17,8 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-// __ROMCC__ means: use "unsigned" for device, not a struct.
-#define __ROMCC__
+// __PRE_RAM__ means: use "unsigned" for device, not a struct.
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
@@ -220,10 +220,10 @@ static void early_ich7_init(void)
#include <cbmem.h>
// Now, this needs to be included because it relies on the symbol
-// __ROMCC_ being set during CAR stage (in order to compile the
+// __PRE_RAM__ being set during CAR stage (in order to compile the
// BSS free versions of the functions). Either rewrite the code
// to be always BSS free, or invent a flag that's better suited than
-// __ROMCC__ to determine whether we're in ram init stage (stage 1)
+// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
//
#include "lib/cbmem.c"
diff --git a/src/mainboard/intel/eagleheights/auto.c b/src/mainboard/intel/eagleheights/auto.c
index 2dce5bb6c3..47043a9067 100644
--- a/src/mainboard/intel/eagleheights/auto.c
+++ b/src/mainboard/intel/eagleheights/auto.c
@@ -20,7 +20,7 @@
* MA 02110-1301 USA
*/
-#define __ROMCC__
+#define __PRE_RAM__
#include <delay.h>
diff --git a/src/mainboard/intel/eagleheights/reset.c b/src/mainboard/intel/eagleheights/reset.c
index d35a6dc629..09308e4678 100644
--- a/src/mainboard/intel/eagleheights/reset.c
+++ b/src/mainboard/intel/eagleheights/reset.c
@@ -22,7 +22,7 @@
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#ifndef __ROMCC__
+#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/mainboard/intel/jarrell/reset.c b/src/mainboard/intel/jarrell/reset.c
index b09b70899d..5364632346 100644
--- a/src/mainboard/intel/jarrell/reset.c
+++ b/src/mainboard/intel/jarrell/reset.c
@@ -1,7 +1,7 @@
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#ifndef __ROMCC__
+#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/mainboard/intel/xe7501devkit/auto.c b/src/mainboard/intel/xe7501devkit/auto.c
index 8e2c271f2b..7269fa8d43 100644
--- a/src/mainboard/intel/xe7501devkit/auto.c
+++ b/src/mainboard/intel/xe7501devkit/auto.c
@@ -1,4 +1,5 @@
#define ASSEMBLY 1
+#define __PRE_RAM__
#include <stdint.h>
#include <device/pci_def.h>
diff --git a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c b/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
index 76e56f80a4..cdfdfc09c5 100644
--- a/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8_htx/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c b/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
index 78b1de980d..271ad6cc54 100644
--- a/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8s2/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c b/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
index 78b1de980d..271ad6cc54 100644
--- a/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
+++ b/src/mainboard/iwill/dk8x/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/kontron/986lcd-m/auto.c b/src/mainboard/kontron/986lcd-m/auto.c
index 003fdb393f..f8304111ce 100644
--- a/src/mainboard/kontron/986lcd-m/auto.c
+++ b/src/mainboard/kontron/986lcd-m/auto.c
@@ -19,8 +19,8 @@
* MA 02110-1301 USA
*/
-// __ROMCC__ means: use "unsigned" for device, not a struct.
-#define __ROMCC__
+// __PRE_RAM__ means: use "unsigned" for device, not a struct.
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
@@ -359,10 +359,10 @@ static void early_ich7_init(void)
#include <cbmem.h>
// Now, this needs to be included because it relies on the symbol
-// __ROMCC_ being set during CAR stage (in order to compile the
+// __PRE_RAM__ being set during CAR stage (in order to compile the
// BSS free versions of the functions). Either rewrite the code
// to be always BSS free, or invent a flag that's better suited than
-// __ROMCC__ to determine whether we're in ram init stage (stage 1)
+// __PRE_RAM__ to determine whether we're in ram init stage (stage 1)
//
#include "lib/cbmem.c"
diff --git a/src/mainboard/kontron/kt690/cache_as_ram_auto.c b/src/mainboard/kontron/kt690/cache_as_ram_auto.c
index 68447baa97..224f60365d 100644
--- a/src/mainboard/kontron/kt690/cache_as_ram_auto.c
+++ b/src/mainboard/kontron/kt690/cache_as_ram_auto.c
@@ -19,7 +19,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define K8_SET_FIDVID 1
diff --git a/src/mainboard/msi/ms7135/cache_as_ram_auto.c b/src/mainboard/msi/ms7135/cache_as_ram_auto.c
index 4b5ab60dcc..6616dc1444 100644
--- a/src/mainboard/msi/ms7135/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms7135/cache_as_ram_auto.c
@@ -23,7 +23,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define SERIAL_DEV PNP_DEV(0x4e, W83627HF_SP1)
diff --git a/src/mainboard/msi/ms7260/apc_auto.c b/src/mainboard/msi/ms7260/apc_auto.c
index 317f9d26d3..84ba6c1daf 100644
--- a/src/mainboard/msi/ms7260/apc_auto.c
+++ b/src/mainboard/msi/ms7260/apc_auto.c
@@ -21,7 +21,7 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/msi/ms7260/cache_as_ram_auto.c b/src/mainboard/msi/ms7260/cache_as_ram_auto.c
index ed84a426b2..7a8bf13a79 100644
--- a/src/mainboard/msi/ms7260/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms7260/cache_as_ram_auto.c
@@ -21,7 +21,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
// #define CACHE_AS_RAM_ADDRESS_DEBUG 1
// #define DEBUG_SMBUS 1
diff --git a/src/mainboard/msi/ms9185/cache_as_ram_auto.c b/src/mainboard/msi/ms9185/cache_as_ram_auto.c
index 95704b9791..255815707a 100644
--- a/src/mainboard/msi/ms9185/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms9185/cache_as_ram_auto.c
@@ -24,7 +24,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/msi/ms9282/cache_as_ram_auto.c b/src/mainboard/msi/ms9282/cache_as_ram_auto.c
index 55f2a33273..11c92b81fa 100644
--- a/src/mainboard/msi/ms9282/cache_as_ram_auto.c
+++ b/src/mainboard/msi/ms9282/cache_as_ram_auto.c
@@ -23,7 +23,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/newisys/khepri/cache_as_ram_auto.c b/src/mainboard/newisys/khepri/cache_as_ram_auto.c
index db76c95d77..efd2ea3a97 100644
--- a/src/mainboard/newisys/khepri/cache_as_ram_auto.c
+++ b/src/mainboard/newisys/khepri/cache_as_ram_auto.c
@@ -4,7 +4,7 @@
* Additional (C) 2007 coresystems GmbH
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/nvidia/l1_2pvv/apc_auto.c b/src/mainboard/nvidia/l1_2pvv/apc_auto.c
index d7c4e2831a..1a9121e40f 100644
--- a/src/mainboard/nvidia/l1_2pvv/apc_auto.c
+++ b/src/mainboard/nvidia/l1_2pvv/apc_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c b/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
index 04fa546f6a..ab6941f22d 100644
--- a/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
+++ b/src/mainboard/nvidia/l1_2pvv/cache_as_ram_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
index 468e049750..9a3f948036 100644
--- a/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
+++ b/src/mainboard/sunw/ultra40/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define K8_ALLOCATE_IO_RANGE 1
diff --git a/src/mainboard/supermicro/h8dme/apc_auto.c b/src/mainboard/supermicro/h8dme/apc_auto.c
index b501cfc76e..bb625933e7 100644
--- a/src/mainboard/supermicro/h8dme/apc_auto.c
+++ b/src/mainboard/supermicro/h8dme/apc_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
index 151b2d0a4a..72d5809ea4 100644
--- a/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dme/cache_as_ram_auto.c
@@ -17,7 +17,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/supermicro/h8dmr/apc_auto.c b/src/mainboard/supermicro/h8dmr/apc_auto.c
index b501cfc76e..bb625933e7 100644
--- a/src/mainboard/supermicro/h8dmr/apc_auto.c
+++ b/src/mainboard/supermicro/h8dmr/apc_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
index 672f551fa1..9c675274af 100644
--- a/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dmr/cache_as_ram_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/supermicro/h8dmr_fam10/apc_auto.c b/src/mainboard/supermicro/h8dmr_fam10/apc_auto.c
index f55b80f826..647637d66e 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/apc_auto.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/apc_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/supermicro/h8dmr_fam10/cache_as_ram_auto.c b/src/mainboard/supermicro/h8dmr_fam10/cache_as_ram_auto.c
index 02615bba0a..4ebc47f6a0 100644
--- a/src/mainboard/supermicro/h8dmr_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/supermicro/h8dmr_fam10/cache_as_ram_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/supermicro/x6dai_g/reset.c b/src/mainboard/supermicro/x6dai_g/reset.c
index f57d7a5098..e168e37a2f 100644
--- a/src/mainboard/supermicro/x6dai_g/reset.c
+++ b/src/mainboard/supermicro/x6dai_g/reset.c
@@ -1,7 +1,7 @@
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#ifndef __ROMCC__
+#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/mainboard/supermicro/x6dhe_g/reset.c b/src/mainboard/supermicro/x6dhe_g/reset.c
index b09b70899d..5364632346 100644
--- a/src/mainboard/supermicro/x6dhe_g/reset.c
+++ b/src/mainboard/supermicro/x6dhe_g/reset.c
@@ -1,7 +1,7 @@
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#ifndef __ROMCC__
+#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/mainboard/supermicro/x6dhe_g2/reset.c b/src/mainboard/supermicro/x6dhe_g2/reset.c
index b09b70899d..5364632346 100644
--- a/src/mainboard/supermicro/x6dhe_g2/reset.c
+++ b/src/mainboard/supermicro/x6dhe_g2/reset.c
@@ -1,7 +1,7 @@
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#ifndef __ROMCC__
+#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/mainboard/supermicro/x6dhr_ig/reset.c b/src/mainboard/supermicro/x6dhr_ig/reset.c
index b09b70899d..5364632346 100644
--- a/src/mainboard/supermicro/x6dhr_ig/reset.c
+++ b/src/mainboard/supermicro/x6dhr_ig/reset.c
@@ -1,7 +1,7 @@
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#ifndef __ROMCC__
+#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/mainboard/supermicro/x6dhr_ig2/reset.c b/src/mainboard/supermicro/x6dhr_ig2/reset.c
index b09b70899d..5364632346 100644
--- a/src/mainboard/supermicro/x6dhr_ig2/reset.c
+++ b/src/mainboard/supermicro/x6dhr_ig2/reset.c
@@ -1,7 +1,7 @@
#include <arch/io.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
-#ifndef __ROMCC__
+#if !defined (__ROMCC__) && !defined (__PRE_RAM__)
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
diff --git a/src/mainboard/technexion/tim5690/cache_as_ram_auto.c b/src/mainboard/technexion/tim5690/cache_as_ram_auto.c
index ce2d6b3eba..7e4e100d43 100644
--- a/src/mainboard/technexion/tim5690/cache_as_ram_auto.c
+++ b/src/mainboard/technexion/tim5690/cache_as_ram_auto.c
@@ -18,7 +18,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define K8_SET_FIDVID 1
diff --git a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c b/src/mainboard/technexion/tim8690/cache_as_ram_auto.c
index 26407076bf..ff86ba3713 100644
--- a/src/mainboard/technexion/tim8690/cache_as_ram_auto.c
+++ b/src/mainboard/technexion/tim8690/cache_as_ram_auto.c
@@ -18,7 +18,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define K8_SET_FIDVID 1
diff --git a/src/mainboard/tyan/s2735/cache_as_ram_auto.c b/src/mainboard/tyan/s2735/cache_as_ram_auto.c
index 8656d3dd5d..99a38a9fb3 100644
--- a/src/mainboard/tyan/s2735/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2735/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/tyan/s2850/cache_as_ram_auto.c b/src/mainboard/tyan/s2850/cache_as_ram_auto.c
index 871e2bac6a..352feadf70 100644
--- a/src/mainboard/tyan/s2850/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2850/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/tyan/s2875/cache_as_ram_auto.c b/src/mainboard/tyan/s2875/cache_as_ram_auto.c
index 56fbdae186..50b12f1ff6 100644
--- a/src/mainboard/tyan/s2875/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2875/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/tyan/s2880/cache_as_ram_auto.c b/src/mainboard/tyan/s2880/cache_as_ram_auto.c
index db520eb360..c97f3b7708 100644
--- a/src/mainboard/tyan/s2880/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2880/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/tyan/s2881/cache_as_ram_auto.c b/src/mainboard/tyan/s2881/cache_as_ram_auto.c
index 69000f15a3..9d5edcb462 100644
--- a/src/mainboard/tyan/s2881/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2881/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/tyan/s2882/cache_as_ram_auto.c b/src/mainboard/tyan/s2882/cache_as_ram_auto.c
index 1fd98ff5bf..cdea6933ed 100644
--- a/src/mainboard/tyan/s2882/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2882/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/tyan/s2885/cache_as_ram_auto.c b/src/mainboard/tyan/s2885/cache_as_ram_auto.c
index edea2b9de2..d561e033c6 100644
--- a/src/mainboard/tyan/s2885/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2885/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/tyan/s2891/cache_as_ram_auto.c b/src/mainboard/tyan/s2891/cache_as_ram_auto.c
index 93b640ac11..9ace5e30ae 100644
--- a/src/mainboard/tyan/s2891/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2891/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
//used by raminit
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/tyan/s2892/cache_as_ram_auto.c b/src/mainboard/tyan/s2892/cache_as_ram_auto.c
index ffe11034d5..e94017e532 100644
--- a/src/mainboard/tyan/s2892/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2892/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define QRANK_DIMM_SUPPORT 1
diff --git a/src/mainboard/tyan/s2895/cache_as_ram_auto.c b/src/mainboard/tyan/s2895/cache_as_ram_auto.c
index 77bd04d330..78ddd1c6a3 100644
--- a/src/mainboard/tyan/s2895/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2895/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define K8_ALLOCATE_IO_RANGE 1
diff --git a/src/mainboard/tyan/s2895/failover.c b/src/mainboard/tyan/s2895/failover.c
index cb70a2e9de..25f488dac4 100644
--- a/src/mainboard/tyan/s2895/failover.c
+++ b/src/mainboard/tyan/s2895/failover.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/tyan/s2912/apc_auto.c b/src/mainboard/tyan/s2912/apc_auto.c
index 880d06a1cf..3e98a5c979 100644
--- a/src/mainboard/tyan/s2912/apc_auto.c
+++ b/src/mainboard/tyan/s2912/apc_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/tyan/s2912/cache_as_ram_auto.c b/src/mainboard/tyan/s2912/cache_as_ram_auto.c
index 8fb6473499..ce466306ce 100644
--- a/src/mainboard/tyan/s2912/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2912/cache_as_ram_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/tyan/s2912_fam10/apc_auto.c b/src/mainboard/tyan/s2912_fam10/apc_auto.c
index 880d06a1cf..3e98a5c979 100644
--- a/src/mainboard/tyan/s2912_fam10/apc_auto.c
+++ b/src/mainboard/tyan/s2912_fam10/apc_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0
diff --git a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c b/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c
index f085a699b5..1216c298b9 100644
--- a/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s2912_fam10/cache_as_ram_auto.c
@@ -20,7 +20,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
diff --git a/src/mainboard/tyan/s4880/cache_as_ram_auto.c b/src/mainboard/tyan/s4880/cache_as_ram_auto.c
index 61085a8d57..9f38ec1992 100644
--- a/src/mainboard/tyan/s4880/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s4880/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/tyan/s4882/cache_as_ram_auto.c b/src/mainboard/tyan/s4882/cache_as_ram_auto.c
index 88637b6dd4..1c8d3b42fe 100644
--- a/src/mainboard/tyan/s4882/cache_as_ram_auto.c
+++ b/src/mainboard/tyan/s4882/cache_as_ram_auto.c
@@ -1,5 +1,5 @@
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#include <stdint.h>
#include <string.h>
diff --git a/src/mainboard/via/epia-m700/cache_as_ram_auto.c b/src/mainboard/via/epia-m700/cache_as_ram_auto.c
index 9c6036af8c..45e8118617 100644
--- a/src/mainboard/via/epia-m700/cache_as_ram_auto.c
+++ b/src/mainboard/via/epia-m700/cache_as_ram_auto.c
@@ -23,7 +23,7 @@
*/
#define ASSEMBLY 1
-#define __ROMCC__
+#define __PRE_RAM__
#define RAMINIT_SYSINFO 1
#define CACHE_AS_RAM_ADDRESS_DEBUG 0