Remove fallback/normal handling in mainboards'

romstage.c like r5255 did for failover/fallback/normal
mainboards.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5257 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

11 files changed, 99 insertions, 636 deletions

diff --git a/src/mainboard/tyan/s2735/romstage.c b/src/mainboard/tyan/s2735/romstage.c
index 5e2678a047..6bcb459236 100644
--- a/src/mainboard/tyan/s2735/romstage.c
+++ b/src/mainboard/tyan/s2735/romstage.c
@@ -80,54 +80,8 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/x86/car/copy_and_run.c"
 
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
-#include "southbridge/intel/i82801ex/cmos_failover.c"
-
-void real_main(unsigned long bist);
-
 void amd64_main(unsigned long bist)
 {
-        /* Is this a deliberate reset by the bios */
-//        post_code(0x22);
-        if (bios_reset_detected() && last_boot_normal()) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else {
-		check_cmos_failed();
-		if (do_normal_boot()) {
-        	        goto normal_image;
-	        }
-        	else {
-	                goto fallback_image;
-        	}
-	}
- normal_image:
-//        post_code(0x23);
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist) /* inputs */
-                );
- cpu_reset:
-//        post_code(0x24);
-#if 0
-        //CPU reset will reset memtroller ???
-        asm volatile ("jmp __cpu_reset" 
-                : /* outputs */ 
-                : "a"(bist) /* inputs */
-                );
-#endif
-
- fallback_image:
-//        post_code(0x25);
-        real_main(bist);
-}
-void real_main(unsigned long bist)
-#else
-void amd64_main(unsigned long bist)
-#endif
-{
 	static const struct mem_controller memctrl[] = {
                 {
                         .d0 = PCI_DEV(0, 0, 0),
diff --git a/src/mainboard/tyan/s2850/romstage.c b/src/mainboard/tyan/s2850/romstage.c
index 352feadf70..d6b13b0b55 100644
--- a/src/mainboard/tyan/s2850/romstage.c
+++ b/src/mainboard/tyan/s2850/romstage.c
@@ -93,72 +93,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-        unsigned last_boot_normal_x = last_boot_normal();
-
-        /* Is this a cpu only reset? or Is this a secondary cpu? */
-        if ((cpu_init_detectedx) || (!boot_cpu())) {
-                if (last_boot_normal_x) {
-                        goto normal_image;
-                } else {
-                        goto fallback_image;
-                }
-        }
-
-        /* Nothing special needs to be done to find bus 0 */
-        /* Allow the HT devices to be found */
-
-        enumerate_ht_chain();
-
-        /* Setup the amd8111 */
-        amd8111_enable_rom();
-
-        /* Is this a deliberate reset by the bios */
-//        post_code(0x22);
-        if (bios_reset_detected() && last_boot_normal_x) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else if (do_normal_boot()) {
-                goto normal_image;
-        }
-        else {
-                goto fallback_image;
-        }
- normal_image:
-//        post_code(0x23);
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist), "b" (cpu_init_detectedx) /* inputs */
-                );
-
- fallback_image:
-//        post_code(0x25);
-	;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-        failover_process(bist, cpu_init_detectedx);
-#endif
-        real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
 	static const struct mem_controller cpu[] = {
 		{
 			.node_id = 0,
@@ -173,6 +112,16 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
+        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+		/* Nothing special needs to be done to find bus 0 */
+		/* Allow the HT devices to be found */
+
+		enumerate_ht_chain();
+
+		/* Setup the amd8111 */
+		amd8111_enable_rom();
+        }
+
         if (bist == 0) {
 		init_cpus(cpu_init_detectedx);
         }
diff --git a/src/mainboard/tyan/s2875/romstage.c b/src/mainboard/tyan/s2875/romstage.c
index 50b12f1ff6..12f41e0ff4 100644
--- a/src/mainboard/tyan/s2875/romstage.c
+++ b/src/mainboard/tyan/s2875/romstage.c
@@ -84,69 +84,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-
-        unsigned last_boot_normal_x = last_boot_normal();
-
-        /* Is this a cpu only reset? or Is this a secondary cpu? */
-        if ((cpu_init_detectedx) || (!boot_cpu())) {
-                if (last_boot_normal_x) {
-                        goto normal_image;
-                } else {
-                        goto fallback_image;
-                }
-        }
-
-        /* Nothing special needs to be done to find bus 0 */
-        /* Allow the HT devices to be found */
-
-        enumerate_ht_chain();
-
-        amd8111_enable_rom();
-
-        /* Is this a deliberate reset by the bios */
-        if (bios_reset_detected() && last_boot_normal_x) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else if (do_normal_boot()) {
-                goto normal_image;
-        }
-        else {
-                goto fallback_image;
-        }
- normal_image:
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist), "b" (cpu_init_detectedx)/* inputs */
-                );
-
- fallback_image:
-	;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-        failover_process(bist, cpu_init_detectedx);
-#endif
-        real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
 	static const struct mem_controller cpu[] = {
 		{
 			.node_id = 0,
@@ -172,6 +114,15 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
+        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+		/* Nothing special needs to be done to find bus 0 */
+		/* Allow the HT devices to be found */
+
+		enumerate_ht_chain();
+
+		amd8111_enable_rom();
+        }
+
         if (bist == 0) {
 		init_cpus(cpu_init_detectedx);
         }
diff --git a/src/mainboard/tyan/s2880/romstage.c b/src/mainboard/tyan/s2880/romstage.c
index c97f3b7708..553910ae73 100644
--- a/src/mainboard/tyan/s2880/romstage.c
+++ b/src/mainboard/tyan/s2880/romstage.c
@@ -85,68 +85,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-        unsigned last_boot_normal_x = last_boot_normal();
-
-        /* Is this a cpu only reset? or Is this a secondary cpu? */
-        if ((cpu_init_detectedx) || (!boot_cpu())) {
-                if (last_boot_normal_x) {
-                        goto normal_image;
-                } else {
-                        goto fallback_image;
-                }
-        }
-
-        /* Nothing special needs to be done to find bus 0 */
-        /* Allow the HT devices to be found */
-
-        enumerate_ht_chain();
-
-        amd8111_enable_rom();
-
-        /* Is this a deliberate reset by the bios */
-        if (bios_reset_detected() && last_boot_normal_x) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else if (do_normal_boot()) {
-                goto normal_image;
-        }
-        else {
-                goto fallback_image;
-        }
- normal_image:
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist), "b" (cpu_init_detectedx) /* inputs */
-                );
-
- fallback_image:
-	;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-        failover_process(bist, cpu_init_detectedx);
-#endif
-        real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
 	static const struct mem_controller cpu[] = {
 		{
 			.node_id = 0,
@@ -172,6 +115,15 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
+        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+		/* Nothing special needs to be done to find bus 0 */
+		/* Allow the HT devices to be found */
+
+		enumerate_ht_chain();
+
+		amd8111_enable_rom();
+        }
+
         if (bist == 0) {
 		init_cpus(cpu_init_detectedx);
         }
diff --git a/src/mainboard/tyan/s2881/romstage.c b/src/mainboard/tyan/s2881/romstage.c
index 9d5edcb462..536f887112 100644
--- a/src/mainboard/tyan/s2881/romstage.c
+++ b/src/mainboard/tyan/s2881/romstage.c
@@ -98,72 +98,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-        unsigned last_boot_normal_x = last_boot_normal();
-
-        /* Is this a cpu only reset? or Is this a secondary cpu? */
-        if ((cpu_init_detectedx) || (!boot_cpu())) {
-                if (last_boot_normal_x) {
-                        goto normal_image;
-                } else {
-                        goto fallback_image;
-                }
-        }
-
-        /* Nothing special needs to be done to find bus 0 */
-        /* Allow the HT devices to be found */
-
-        enumerate_ht_chain();
-
-        /* Setup the amd8111 */
-        amd8111_enable_rom();
-
-        /* Is this a deliberate reset by the bios */
-//        post_code(0x22);
-        if (bios_reset_detected() && last_boot_normal_x) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else if (do_normal_boot()) {
-                goto normal_image;
-        }
-        else {
-                goto fallback_image;
-        }
- normal_image:
-//        post_code(0x23);
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist), "b" (cpu_init_detectedx) /* inputs */
-                );
-
- fallback_image:
-//        post_code(0x25);
-	;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-        failover_process(bist, cpu_init_detectedx);
-#endif
-        real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
 	static const uint16_t spd_addr [] = {
 			(0xa<<3)|0, (0xa<<3)|2, 0, 0,
 			(0xa<<3)|1, (0xa<<3)|3, 0, 0,
@@ -179,6 +118,16 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
         struct mem_controller ctrl[8];
         unsigned nodes;
 
+        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+		/* Nothing special needs to be done to find bus 0 */
+		/* Allow the HT devices to be found */
+
+		enumerate_ht_chain();
+
+		/* Setup the amd8111 */
+		amd8111_enable_rom();
+        }
+
         if (bist == 0) {
                 bsp_apicid = init_cpus(cpu_init_detectedx);
         }
diff --git a/src/mainboard/tyan/s2882/romstage.c b/src/mainboard/tyan/s2882/romstage.c
index cdea6933ed..2fe7561deb 100644
--- a/src/mainboard/tyan/s2882/romstage.c
+++ b/src/mainboard/tyan/s2882/romstage.c
@@ -88,68 +88,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-        unsigned last_boot_normal_x = last_boot_normal();
-
-        /* Is this a cpu only reset? or Is this a secondary cpu? */
-        if ((cpu_init_detectedx) || (!boot_cpu())) {
-                if (last_boot_normal_x) {
-                        goto normal_image;
-                } else {
-                        goto fallback_image;
-                }
-        }
-
-        /* Nothing special needs to be done to find bus 0 */
-        /* Allow the HT devices to be found */
-
-        enumerate_ht_chain();
-
-        amd8111_enable_rom();
-
-        /* Is this a deliberate reset by the bios */
-        if (bios_reset_detected() && last_boot_normal_x) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else if (do_normal_boot()) {
-                goto normal_image;
-        }
-        else {
-                goto fallback_image;
-        }
- normal_image:
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist) , "b" (cpu_init_detectedx) /* inputs */
-                );
-
- fallback_image:
-	;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-        failover_process(bist, cpu_init_detectedx);
-#endif
-        real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
 	static const struct mem_controller cpu[] = {
 		{
 			.node_id = 0,
@@ -175,6 +118,15 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
+        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+		/* Nothing special needs to be done to find bus 0 */
+		/* Allow the HT devices to be found */
+
+		enumerate_ht_chain();
+
+		amd8111_enable_rom();
+        }
+
         if (bist == 0) {
 		init_cpus(cpu_init_detectedx);
         }
diff --git a/src/mainboard/tyan/s2885/romstage.c b/src/mainboard/tyan/s2885/romstage.c
index d561e033c6..5b178f7e9f 100644
--- a/src/mainboard/tyan/s2885/romstage.c
+++ b/src/mainboard/tyan/s2885/romstage.c
@@ -98,72 +98,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-        unsigned last_boot_normal_x = last_boot_normal();
-
-        /* Is this a cpu only reset? or Is this a secondary cpu? */
-        if ((cpu_init_detectedx) || (!boot_cpu())) {
-                if (last_boot_normal_x) {
-                        goto normal_image;
-                } else {
-                        goto fallback_image;
-                }
-        }
-
-        /* Nothing special needs to be done to find bus 0 */
-        /* Allow the HT devices to be found */
-
-        enumerate_ht_chain();
-
-        /* Setup the amd8111 */
-        amd8111_enable_rom();
-
-        /* Is this a deliberate reset by the bios */
-//        post_code(0x22);
-        if (bios_reset_detected() && last_boot_normal_x) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else if (do_normal_boot()) {
-                goto normal_image;
-        }
-        else {
-                goto fallback_image;
-        }
- normal_image:
-//        post_code(0x23);
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist), "b" (cpu_init_detectedx) /* inputs */
-                );
-
- fallback_image:
-//        post_code(0x25);
-	;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-        failover_process(bist, cpu_init_detectedx);
-#endif
-        real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
 	static const uint16_t spd_addr [] = {
 			(0xa<<3)|0, (0xa<<3)|2, 0, 0,
 			(0xa<<3)|1, (0xa<<3)|3, 0, 0,
@@ -179,6 +118,16 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
         struct mem_controller ctrl[8];
         unsigned nodes;
 
+        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+		/* Nothing special needs to be done to find bus 0 */
+		/* Allow the HT devices to be found */
+
+		enumerate_ht_chain();
+
+		/* Setup the amd8111 */
+		amd8111_enable_rom();
+        }
+
         if (bist == 0) {
                 bsp_apicid = init_cpus(cpu_init_detectedx);
         }
diff --git a/src/mainboard/tyan/s2891/romstage.c b/src/mainboard/tyan/s2891/romstage.c
index 9ace5e30ae..0505493dc1 100644
--- a/src/mainboard/tyan/s2891/romstage.c
+++ b/src/mainboard/tyan/s2891/romstage.c
@@ -77,8 +77,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/nvidia/ck804/ck804_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
@@ -112,68 +110,8 @@ static void sio_setup(void)
 
 }
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-	unsigned last_boot_normal_x = last_boot_normal();
-
-	/* Is this a cpu only reset? or Is this a secondary cpu? */
-	if ((cpu_init_detectedx) || (!boot_cpu())) {
-	if (last_boot_normal_x) {
-	goto normal_image;
-	} else {
-	goto fallback_image;
-	}
-	}
-
-	/* Nothing special needs to be done to find bus 0 */
-	/* Allow the HT devices to be found */
-
-	enumerate_ht_chain();
-
-	sio_setup();
-
-	/* Setup the ck804 */
-	ck804_enable_rom();
-
-	/* Is this a deliberate reset by the bios */
-//	post_code(0x22);
-	if (bios_reset_detected() && last_boot_normal_x) {
-	goto normal_image;
-	}
-	/* This is the primary cpu how should I boot? */
-	else if (do_normal_boot()) {
-	goto normal_image;
-	}
-	else {
-	goto fallback_image;
-	}
- normal_image:
-//	post_code(0x23);
-	__asm__ volatile ("jmp __normal_image"
-	: /* outputs */
-	: "a" (bist), "b"(cpu_init_detectedx) /* inputs */
-	);
-
- fallback_image:
-//	post_code(0x25);
-	;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-		failover_process(bist, cpu_init_detectedx);
-#endif
-	real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
 	static const uint16_t spd_addr [] = {
 		(0xa<<3)|0, (0xa<<3)|2, 0, 0,
 		(0xa<<3)|1, (0xa<<3)|3, 0, 0,
@@ -189,6 +127,18 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct mem_controller ctrl[8];
 	unsigned nodes;
 
+	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+		/* Nothing special needs to be done to find bus 0 */
+		/* Allow the HT devices to be found */
+
+		enumerate_ht_chain();
+
+		sio_setup();
+
+		/* Setup the ck804 */
+		ck804_enable_rom();
+	}
+
 	if (bist == 0) {
 		bsp_apicid = init_cpus(cpu_init_detectedx);
 	}
diff --git a/src/mainboard/tyan/s2892/romstage.c b/src/mainboard/tyan/s2892/romstage.c
index e94017e532..1a4766cbea 100644
--- a/src/mainboard/tyan/s2892/romstage.c
+++ b/src/mainboard/tyan/s2892/romstage.c
@@ -82,8 +82,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/nvidia/ck804/ck804_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
@@ -101,66 +99,8 @@ static void sio_setup(void)
 	pci_write_config32(PCI_DEV(0, CK804_DEVN_BASE+1 , 0), 0xa0, dword);
 }
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-	unsigned last_boot_normal_x = last_boot_normal();
-
-	/* Is this a cpu only reset? or Is this a secondary cpu? */
-	if ((cpu_init_detectedx) || (!boot_cpu())) {
-		if (last_boot_normal_x) {
-			goto normal_image;
-		} else {
-			goto fallback_image;
-		}
-	}
-
-	/* Nothing special needs to be done to find bus 0 */
-	/* Allow the HT devices to be found */
-
-	enumerate_ht_chain();
-
-	sio_setup();
-
-	/* Setup the ck804 */
-	ck804_enable_rom();
-
-	/* Is this a deliberate reset by the bios */
-//	post_code(0x22);
-	if (bios_reset_detected() && last_boot_normal_x) {
-		goto normal_image;
-	}
-	/* This is the primary cpu how should I boot? */
-	else if (do_normal_boot()) {
-		goto normal_image;
-	}
-	else {
-		goto fallback_image;
-	}
- normal_image:
-//	post_code(0x23);
-	__asm__ volatile ("jmp __normal_image"
-	: /* outputs */
-	: "a" (bist), "b"(cpu_init_detectedx) /* inputs */
-	);
-
- fallback_image:
-//	post_code(0x25);
-	;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-	#if CONFIG_USE_FALLBACK_IMAGE == 1
-	failover_process(bist, cpu_init_detectedx);
-	#endif
-	real_main(bist, cpu_init_detectedx);
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
 	static const uint16_t spd_addr [] = {
 		(0xa<<3)|0, (0xa<<3)|2, 0, 0,
 		(0xa<<3)|1, (0xa<<3)|3, 0, 0,
@@ -176,6 +116,18 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	struct mem_controller ctrl[8];
 	unsigned nodes;
 
+	if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+		/* Nothing special needs to be done to find bus 0 */
+		/* Allow the HT devices to be found */
+
+		enumerate_ht_chain();
+
+		sio_setup();
+
+		/* Setup the ck804 */
+		ck804_enable_rom();
+	}
+
 	if (bist == 0) {
 		bsp_apicid = init_cpus(cpu_init_detectedx);
 	}
diff --git a/src/mainboard/tyan/s4880/romstage.c b/src/mainboard/tyan/s4880/romstage.c
index 9f38ec1992..590de9f922 100644
--- a/src/mainboard/tyan/s4880/romstage.c
+++ b/src/mainboard/tyan/s4880/romstage.c
@@ -111,68 +111,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-        unsigned last_boot_normal_x = last_boot_normal();
-
-        /* Is this a cpu only reset? or Is this a secondary cpu? */
-        if ((cpu_init_detectedx) || (!boot_cpu())) {
-                if (last_boot_normal_x) {
-                        goto normal_image;
-                } else {
-                        goto fallback_image;
-                }
-        }
-
-        /* Nothing special needs to be done to find bus 0 */
-        /* Allow the HT devices to be found */
-
-        enumerate_ht_chain();
-
-        amd8111_enable_rom();
-
-        /* Is this a deliberate reset by the bios */
-        if (bios_reset_detected() && last_boot_normal_x) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else if (do_normal_boot()) {
-                goto normal_image;
-        }
-        else {
-                goto fallback_image;
-        }
- normal_image:
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist), "b" (cpu_init_detectedx) /* inputs */
-                );
-
- fallback_image:
-	;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-        failover_process(bist, cpu_init_detectedx);
-#endif
-        real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
 	static const struct mem_controller cpu[] = {
                 {
                         .node_id = 0,
@@ -222,6 +165,15 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
 
         int needs_reset;
 
+        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+		/* Nothing special needs to be done to find bus 0 */
+		/* Allow the HT devices to be found */
+
+		enumerate_ht_chain();
+
+		amd8111_enable_rom();
+        }
+
         if (bist == 0) {
 		init_cpus(cpu_init_detectedx);
         }
diff --git a/src/mainboard/tyan/s4882/romstage.c b/src/mainboard/tyan/s4882/romstage.c
index 1c8d3b42fe..d1233b4d31 100644
--- a/src/mainboard/tyan/s4882/romstage.c
+++ b/src/mainboard/tyan/s4882/romstage.c
@@ -119,67 +119,11 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include "cpu/amd/model_fxx/init_cpus.c"
 
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-
 #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
 #include "northbridge/amd/amdk8/early_ht.c"
 
-void failover_process(unsigned long bist, unsigned long cpu_init_detectedx)
-{
-        unsigned last_boot_normal_x = last_boot_normal();
-
-        /* Is this a cpu only reset? or Is this a secondary cpu? */
-        if ((cpu_init_detectedx) || (!boot_cpu())) {
-                if (last_boot_normal_x) {
-                        goto normal_image;
-                } else {
-                        goto fallback_image;
-                }
-        }
-
-        /* Nothing special needs to be done to find bus 0 */
-        /* Allow the HT devices to be found */
-
-        enumerate_ht_chain();
-
-        amd8111_enable_rom();
-
-        /* Is this a deliberate reset by the bios */
-        if (bios_reset_detected() && last_boot_normal_x) {
-                goto normal_image;
-        }
-        /* This is the primary cpu how should I boot? */
-        else if (do_normal_boot()) {
-                goto normal_image;
-        }
-        else {
-                goto fallback_image;
-        }
- normal_image:
-        __asm__ volatile ("jmp __normal_image"
-                : /* outputs */
-                : "a" (bist), "b" ( cpu_init_detectedx ) /* inputs */
-                );
-
- fallback_image:
-	;
-}
-#endif
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx);
-
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
-
-#if CONFIG_USE_FALLBACK_IMAGE == 1
-        failover_process(bist, cpu_init_detectedx);
-#endif
-        real_main(bist, cpu_init_detectedx);
-
-}
-
-void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
-{
 	static const uint16_t spd_addr [] = {
                         RC0|DIMM0, RC0|DIMM2, 0, 0,
                         RC0|DIMM1, RC0|DIMM3, 0, 0,
@@ -201,6 +145,15 @@ void real_main(unsigned long bist, unsigned long cpu_init_detectedx)
         struct mem_controller ctrl[8];
         unsigned nodes;
 
+        if (!((cpu_init_detectedx) || (!boot_cpu()))) {
+		/* Nothing special needs to be done to find bus 0 */
+		/* Allow the HT devices to be found */
+
+		enumerate_ht_chain();
+
+		amd8111_enable_rom();
+        }
+
         if (bist == 0) {
                 bsp_apicid = init_cpus(cpu_init_detectedx);
         }