diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-03-10 17:53:14 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2022-03-15 10:17:25 +0000 |
| commit | 2eb51aace5489b2f2d20e510f19a1e3b17bf1d60 (patch) | |
| tree | 9bf2dcdc8ca37ca5aa4c49a24c0c5e764928d7f1 /src/mainboard/system76 | |
| parent | 5730d018d1395cf68c2fe0e795831f6780c734de (diff) | |
{mb, soc}: Change `memcfg_init()` and `variant_memory_init()` prototype
This patch modifies `memcfg_init` and `variant_memory_init`functions
argument from FSP_M_CONFIG to FSPM_UPD.
This change in `memcfg_init()` argument will help to update the
architectural FSP-M UPDs from common code blocks rather than going
into SoC and/or mainboard implementation.
BUG=b:200243989
BRANCH=firmware-brya-14505.B
TEST=Able to build and boot redrix without any visible failure/errors.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I3002dd5c2f3703de41f38512976296f63e54d0c5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62736
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Zhuohao Lee <zhuohao@google.com>
Diffstat (limited to 'src/mainboard/system76')
| -rw-r--r-- | src/mainboard/system76/darp7/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/system76/galp5/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/system76/gaze16/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/system76/lemp10/romstage.c | 2 | ||||
| -rw-r--r-- | src/mainboard/system76/oryp8/romstage.c | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/system76/darp7/romstage.c b/src/mainboard/system76/darp7/romstage.c index a72b647d37..eb4fd3974b 100644 --- a/src/mainboard/system76/darp7/romstage.c +++ b/src/mainboard/system76/darp7/romstage.c @@ -18,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; const bool half_populated = false; - memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); + memcfg_init(mupd, &board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/system76/galp5/romstage.c b/src/mainboard/system76/galp5/romstage.c index a72b647d37..eb4fd3974b 100644 --- a/src/mainboard/system76/galp5/romstage.c +++ b/src/mainboard/system76/galp5/romstage.c @@ -18,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; const bool half_populated = false; - memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); + memcfg_init(mupd, &board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/system76/gaze16/romstage.c b/src/mainboard/system76/gaze16/romstage.c index f46e83c656..119c3f5d38 100644 --- a/src/mainboard/system76/gaze16/romstage.c +++ b/src/mainboard/system76/gaze16/romstage.c @@ -26,5 +26,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) const bool half_populated = false; - memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); + memcfg_init(mupd, &board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/system76/lemp10/romstage.c b/src/mainboard/system76/lemp10/romstage.c index 6a916200b4..749efe668f 100644 --- a/src/mainboard/system76/lemp10/romstage.c +++ b/src/mainboard/system76/lemp10/romstage.c @@ -18,5 +18,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }; const bool half_populated = false; - memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); + memcfg_init(mupd, &board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/system76/oryp8/romstage.c b/src/mainboard/system76/oryp8/romstage.c index affe6369cc..64cc844064 100644 --- a/src/mainboard/system76/oryp8/romstage.c +++ b/src/mainboard/system76/oryp8/romstage.c @@ -26,5 +26,5 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) // Enable M.2 PCIE 4.0 and PEG1 mupd->FspmConfig.CpuPcieRpEnableMask = 0x3; - memcfg_init(&mupd->FspmConfig, &board_cfg, &spd_info, half_populated); + memcfg_init(mupd, &board_cfg, &spd_info, half_populated); } |