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authorFelix Held <felix-coreboot@felixheld.de>2024-05-09 19:26:32 +0200
committerFelix Held <felix-coreboot@felixheld.de>2024-05-22 15:45:01 +0000
commit59d1796d668470d99aee80922b12e3f95550ffff (patch)
tree37a933e3475bb87f375d9fcd029ec7db07da474e /src/mainboard/system76/tgl-u/spd
parentf2ac23fb13d4c694658b4bb23ab3736cec77c4fa (diff)
soc/amd/phoenix/chipset_*.cb: remove TODO
Remove the TODO to update the chipset devicetree for Phoenix, since this has already been done. When re-checking the chipset devicetree, I found conflicting information about the existence of the PCI bridge to an external PCIe port on bus 0 device 1 function 5, but after looking into this, I'm reasonably certain that it either doesn't exist or at least wouldn't be usable, so I won't add that one to the chipset devicetree. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I8f0e1540ed45408e86186253d3982a7ba0065ac6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/82578 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
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