diff options
| author | Jeremy Soller <jeremy@system76.com> | 2021-10-13 08:16:04 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-11-02 20:48:37 +0000 |
| commit | b44202b29ab27b6a902ed7abb41288b6461b66aa (patch) | |
| tree | 1b7f275b2aca9c37deeb13c4559f64b81205cecc /src/mainboard/system76/oryp8/acpi/sleep.asl | |
| parent | fdaccd875da610954e3bc1136fad8a3c70ceae71 (diff) | |
mb/system76/oryp8: Add System76 Oryx Pro 8
https://tech-docs.system76.com/models/oryp8/README.html
Tested with TianoCore (UeifPayloadPkg).
Working:
- PS/2 keyboard, touchpad
- Both DIMM slots
- Both M.2 SSD slots
- All USB ports
- Webcam
- Ethernet
- WiFi/Bluetooth
- Integrated graphics using Intel GOP driver
- Internal microphone
- Internal speakers
- Combined 3.5mm headphone & microphone jack
- Combined 3.5mm microphone & S/PDIF jack*
- S3 suspend/resume
- Booting to Pop!_OS Linux 21.10 and Windows 10 20H2
- Flashing with flashrom
Not working:
- Discrete/Hybrid graphics
Not tested:
- Thunderbolt functionality
- S/PDIF output
Change-Id: Iabc8e273f997d7f5852ddec63e0c1bf0c9434acb
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57652
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/mainboard/system76/oryp8/acpi/sleep.asl')
| -rw-r--r-- | src/mainboard/system76/oryp8/acpi/sleep.asl | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/src/mainboard/system76/oryp8/acpi/sleep.asl b/src/mainboard/system76/oryp8/acpi/sleep.asl new file mode 100644 index 0000000000..83888f3e59 --- /dev/null +++ b/src/mainboard/system76/oryp8/acpi/sleep.asl @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <intelblocks/gpio.h> + +Method (PGPM, 1, Serialized) +{ + For (Local0 = 0, Local0 < 6, Local0++) + { + \_SB.PCI0.CGPM (Local0, Arg0) + } +} + +/* + * Method called from _PTS prior to system sleep state entry + * Enables dynamic clock gating for all 5 GPIO communities + */ +Method (MPTS, 1, Serialized) +{ + \_SB.PCI0.LPCB.EC0.PTS (Arg0) + PGPM (MISCCFG_GPIO_PM_CONFIG_BITS) +} + +/* + * Method called from _WAK prior to system sleep state wakeup + * Disables dynamic clock gating for all 5 GPIO communities + */ +Method (MWAK, 1, Serialized) +{ + PGPM (0) + \_SB.PCI0.LPCB.EC0.WAK (Arg0) +} + +/* + * S0ix Entry/Exit Notifications + * Called from \_SB.PEPD._DSM + */ +Method (MS0X, 1, Serialized) +{ + If (Arg0 == 1) { + /* S0ix Entry */ + PGPM (MISCCFG_GPIO_PM_CONFIG_BITS) + } Else { + /* S0ix Exit */ + PGPM (0) + } +} |