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authorHarsha B R <harsha.b.r@intel.com>2022-12-16 12:47:55 +0530
committerEric Lai <eric_lai@quanta.corp-partner.google.com>2022-12-29 07:10:55 +0000
commit7fb5bf8893fe311a9ce33f9125b2e111952092c7 (patch)
tree88801eaccd072077aa6891fdca132e2d05342d45 /src/mainboard/system76/cml-u/cmos.layout
parentec0a85b5807320695a89cba6bffcaca6d0bbc0f1 (diff)
mb/intel/mtlrvp: Add configuration for UART devices
This patch adds below configuration for MTL-RVP UART devices, Interface -> UART0 PCI -> 0:0x1e:0 Device -> AP UART BUG=b:224325352 TEST=Able to build with the patch and boot the mtlrvp ito chromeOS using subsequent patches in the train. UART logs appear on AP console. Signed-off-by: Harsha B R <harsha.b.r@intel.com> Change-Id: I4702d603aa49357f4db0d18d646e536d9d81787e Signed-off-by: Jamie Ryu <jamie.m.ryu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70873 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Krishna P Bhat D <krishna.p.bhat.d@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
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