summaryrefslogtreecommitdiff
path: root/src/mainboard/supermicro
diff options
context:
space:
mode:
authorMartin Roth <martinroth@chromium.org>2021-04-30 16:45:08 -0600
committerRaul Rangel <rrangel@chromium.org>2021-06-10 20:47:59 +0000
commit146508d7495c443a6f59267a13d617e9a0ae031e (patch)
treef0fae3a7093cdbd8507260c5df5ee1fbef310226 /src/mainboard/supermicro
parentae41dd3344623d07edd42aaa919d2439a42d6a3c (diff)
drivers/intel/fsp2_0: Add timestamps for loading FSPM & FSPS
The loads of the FSPM and FSPS binaries are not insignificant amounts of time, and without these timestamps, it's not clear what's going on in those time blocks. For FSPM, the timestamps can run together to make it look like that time is still part of the romstage init time. Example: 6:end of verified boot 387,390 (5,402) 13:starting to load romstage 401,931 (14,541) 14:finished loading romstage 420,560 (18,629) 970:loading FSP-M 450,698 (30,138) 15:starting LZMA decompress (ignore for x86) 464,173 (13,475) 16:finished LZMA decompress (ignore for x86) 517,860 (53,687) ... 9:finished loading ramstage 737,191 (18,377) 10:start of ramstage 757,584 (20,393) 30:device enumeration 790,382 (32,798) 971:loading FSP-S 840,186 (49,804) 15:starting LZMA decompress (ignore for x86) 853,834 (13,648) 16:finished LZMA decompress (ignore for x86) 888,830 (34,996) BUG=b:188981986 TEST=Build & Boot guybrush, look at timestamps. Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: I5796d4cdd512799c2eafee45a8ef561de5258b91 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52867 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/mainboard/supermicro')
0 files changed, 0 insertions, 0 deletions