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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-10-05 14:47:00 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-10-14 20:19:46 +0000 |
| commit | 7f7b01d46747e0147cac4427a2667dd6bf213a91 (patch) | |
| tree | f591bcdc478a0e488b19773fff36d39c70f5cf41 /src/mainboard/supermicro/x10slm-f/dsdt.asl | |
| parent | b3dcb96dc57ade665306e9c03f41353fd11737aa (diff) | |
soc/amd/sata.c: Hook up directly in devicetree
Cezanne has two SATA controllers, but doesn't select
SOC_AMD_COMMON_BLOCK_SATA, so it's not added to the SATA devices in the
Cezanne chipset devicetree.
Change-Id: If7f0a9638151cf981d891464a2c3a0ec5fc9c780
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68142
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Diffstat (limited to 'src/mainboard/supermicro/x10slm-f/dsdt.asl')
0 files changed, 0 insertions, 0 deletions