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authorSean Rhodes <sean@starlabs.systems>2022-06-27 09:41:17 +0100
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-07-22 21:40:03 +0000
commitd061c749497921d74f0d18eec451a87bceda7a19 (patch)
tree7dc8bb03949a67cb50b9df095a06c8b51478bdd9 /src/mainboard/starlabs
parent7710c68e2a8009cb7e8ed8b3205da03333915eba (diff)
mb/starlabs/lite: Simplify the flash layout
Remove the sections that coreboot doesn't need to know about. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: Ide6c0d44f1f9ad9b962d2b8e14ac91e87f5ca031 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65453 Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/starlabs')
-rw-r--r--src/mainboard/starlabs/lite/board.fmd152
1 files changed, 53 insertions, 99 deletions
diff --git a/src/mainboard/starlabs/lite/board.fmd b/src/mainboard/starlabs/lite/board.fmd
index 57e54247b8..5e16badf5c 100644
--- a/src/mainboard/starlabs/lite/board.fmd
+++ b/src/mainboard/starlabs/lite/board.fmd
@@ -1,105 +1,59 @@
- # Start End Length
+# Complete IFWI Map
+# Start (hex) End (hex) Length (hex) Area Name
+# ----------- --------- ------------ ---------
+#
+# 00000000 007FFFFF 00800000 Full Flash Image
+# 00000014 00000017 00000004 FLMAP0 - Flash Map 0 Register
+# 00000018 0000001B 00000004 FLMAP1 - Flash Map 1 Register
+# 0000001C 0000001F 00000004 FLMAP2 - Flash Map 2 Register
+# 00000030 0000003B 0000000C FCBA - Flash Component Registers
+# 00000040 00000043 00000004 FLREG0 - Flash Region 0 (Flash Descriptor) Register
+# 00000044 00000047 00000004 FLREG1 - Flash Region 1 (IFWI) Register
+# 00000048 0000004B 00000004 FLREG2 - Flash Region 2 (Intel(R) TXE) Register
+# 00000050 00000053 00000004 FLREG4 - Flash Region 4 (Platform Data) Register
+# 00000054 00000057 00000004 FLREG5 - Flash Region 5 (Device Expansion) Register
+# 00000060 00000063 00000004 FLREG8 - Flash Region 8 (Embedded Controller) Register
+# 00000080 00000083 00000004 FLMSTR1 - Flash Master 1 (Host CPU/BIOS)
+# 00000084 00000087 00000004 FLMSTR2 - Flash Master 2 (Intel(R) TXE)
+# 00000090 00000093 00000004 FLMSTR5 - Flash Master 5 (EC)
+# 00000100 000002FF 00000200 FPSBA - SoC Straps (Including Padding)
+# 00000DF0 00000EFF 00000110 VSCC Table
+# 00000DF0 00000DF7 00000008 GD25LQ64
+# 00001000 0037FFFF 0037F000 Boot Partition 1
+# 00001000 000C2FFF 000C2000 Primary Boot Partition
+# 00001200 0000120F 00000010 IFP Overrides Partition
+# 00001210 00001317 00000108 Unified Emulation Partition (UEP)
+# 00002000 00002FFF 00001000 OEM SMIP Partition
+# 00003000 0000DFFF 0000B000 CSE RBE Partition
+# 0000E000 0001CFFF 0000F000 PMCP
+# 0001D000 0007DFFF 00061000 CSE BUP Partition
+# 0007E000 000A3FFF 00026000 uCode Partition
+# 0007E040 0009083F 00012800 uCode Patch 1
+# 00090840 000A303F 00012800 uCode Patch 2
+# 000A4000 000C0FFF 0001D000 IBB Partition
+# 000C1000 000C2FFF 00002000 Debug Token Partition
+# 000C3000 001C6FFF 00104000 Secondary Boot Partition
+# 000C4000 001C6FFF 00103000 CSE Main Partition
+# 00380000 006FEFFF 0037F000 Boot Partition 2
+# 00380000 003801FF 00000200 Primary Boot Partition
+# 00380200 0062FFFF 002AFE00 Secondary Boot Partition
+# 00381000 0062FFFF 002AF000 OBB Partition
+# 006FF000 007FFFFF 00101000 TXE Data Region
+# coreboot only needs to know about the OBB. It's nested inside OBBP, to account for
+# the header.
FLASH 8M {
- # 00000014 00000017 00000004 FLMAP0 - Flash Map 0 Register
- FLMAP0@0x14 0x4
- # 00000018 0000001B 00000004 FLMAP1 - Flash Map 1 Register
- FLMAP1@0x18 0x4
- # 0000001C 0000001F 00000004 FLMAP2 - Flash Map 2 Register
- FLMAP2@0x1c 0x4
- # 00000030 0000003B 0000000C FCBA - Flash Component Registers
- FCBA@0x30 0xc
- # 00000040 00000043 00000004 FLREG0 - Flash Region 0 (Flash Descriptor) Register
- FLREG0@0x40 0x4
- # 00000044 00000047 00000004 FLREG1 - Flash Region 1 (IFWI) Register
- FLREG1@0x44 0x4
- # 00000048 0000004B 00000004 FLREG2 - Flash Region 2 (Intel(R) TXE) Register
- FLREG2@0x48 0x4
- # 00000050 00000053 00000004 FLREG4 - Flash Region 4 (Platform Data) Register
- FLREG4@0x50 0x4
- # 00000054 00000057 00000004 FLREG5 - Flash Region 5 (Device Expansion) Register
- FLREG5@0x54 0x4
- # 00000060 00000063 00000004 FLREG8 - Flash Region 8 (Embedded Controller) Register
- FLREG8@0x60 0x4
- # 00000080 00000083 00000004 FLMSTR1 - Flash Master 1 (Host CPU/BIOS)
- FLMSTR1@0x80 0x4
- # 00000084 00000087 00000004 FLMSTR2 - Flash Master 2 (Intel(R) TXE)
- FLMSTR2@0x84 0x4
- # 00000090 00000093 00000004 FLMSTR5 - Flash Master 5 (EC)
- FMSTR5@0x90 0x4
- # 00000100 000002FF 00000200 FPSBA - SoC Straps (Including Padding)
- FPSBA@0x100 0x200
-
- # 00000DF0 00000EFF 00000110 VSCC Table
- VSCC@0xdf0 0x110 {
- # 00000DF0 00000DF7 00000008 GD25LQ64
- VSCC3@0xdf 0x08
- }
-
-
- # APL and GLK will memory map the BIOS region. This will be mapped at (0x100000000 - sizeof(BIOS)).
- # BIOS = BP1 + BP2 = 0x6fe000.
-
- # 00001000 0037FFFF 0037F000 Boot Partition 1
- BP1@0x1000 0x37f000 {
- # 00001000 000ABFFF 000AB000 Primary Boot Partition
- PBP1@0x0 0xab000 {
- # 00001200 0000120F 00000010 IFP Overrides Partition
- IFPOP@0x200 0x10
- # 00001210 00001317 00000108 Unified Emulation Partition (UEP)
- UEP@0x210 0x108
- # 00002000 00002FFF 00001000 OEM SMIP Partition
- SMIP@0x1000 0x1000
- # 00003000 0000DFFF 0000B000 CSE RBE Partition
- CSERBE@0x2000 0xB000
- # 0000E000 0001CFFF 0000F000 PMCP
- PMCP@0xd000 0xf000
- # 0001D000 0007DFFF 00061000 CSE BUP Partition
- CSEBUP@0x1c000 0x61000
- # 0007E000 000A2FFF 00025000 uCode Partition
- UCODE@0x7d000 0x25000 {
- # 0007E040 0009043F 00012400 uCode Patch 1
- PATCH1@0x40 0x12400
- # 00090440 000A2C3F 00012800 uCode Patch 2
- PATCH2@0x12440 0x12800
+ OBBP@0x382000 {
+ OBB@0x0 0x2ae000 {
+ FMAP@0xe000 0x10000
+ COREBOOT(CBFS)@0x1e000 0x210000
+ FPF_STATUS@0x22e000 0x10000
+ UNIFIED_MRC_CACHE@0x23e000 0x30000 {
+ RECOVERY_MRC_CACHE@0x0 0x10000
+ RW_MRC_CACHE@0x10000 0x10000
+ RW_VAR_MRC_CACHE@0x20000 0x10000
}
- # 000A3000 000A9FFF 00007000 IBB Partition
- IBB@0xa2000 0x7000
- # 000AA000 000ABFFF 00002000 Debug Token Partition
- DEBUG@0xa9000 0x2000
- }
- # 000AC000 001ADFFF 00102000 Secondary Boot Partition
- SBP1@0xac000 0x102000 {
- # 000AD000 001ADFFF 00101000 CSE Main Partition
- CSE@0x1000 0x101000
+ SMMSTORE@0x26e000 0x40000
}
}
-
- # 00380000 006FEFFF 0037F000 Boot Partition 2
- BP2@0x380000 0x37f000 {
- # 00380000 003801FF 00000200 Primary Boot Partition
- PBP2@0x0 0x200
- # 00380200 00681FFF 00301E00 Secondary Boot Partition
- SBP2@0x200 0x301e00 {
- # 00381000 00681FFF 00301000 OBB Partition
- OBBP@0x1e00 0x2f8000 {
- OBB@0x0 0x2ae000 {
- FMAP@0xe000 0x10000
- COREBOOT(CBFS)@0x1e000 0x210000
- FPF_STATUS@0x22e000 0x10000
- UNIFIED_MRC_CACHE@0x23e000 0x30000 {
- RECOVERY_MRC_CACHE@0x0 0x10000
- RW_MRC_CACHE@0x10000 0x10000
- RW_VAR_MRC_CACHE@0x20000 0x10000
- }
- }
- NVSTORAGE@0x2ae000 0x48000 {
- SMMSTORE@0x0 0x40000
- }
- }
- }
- }
-
- # 006FF000 007FFFFF 00101000 TXE Data Region
- TXE@0x6ff000 0x101000
}