diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2024-10-03 11:12:54 +0100 |
|---|---|---|
| committer | Sean Rhodes <sean@starlabs.systems> | 2024-10-11 11:27:18 +0000 |
| commit | 68f33d228ef2a79878042b7d62db63f73fa77561 (patch) | |
| tree | f9572ffb2a2002b363a6d667cdf9dcce11f4a025 /src/mainboard/starlabs/lite | |
| parent | 29b5f1ddcb164bff639ffb631095ab26013284d7 (diff) | |
mb/starlabs/*: Enhance USB configuration and comments
Some boards use hubs for devices, so correct the ACPI configuration
for these ports. Also, add more information to the comments for the
ports.
Change-Id: I8472130aba8e777557cf68280fa0058dbeb77df9
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84650
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Diffstat (limited to 'src/mainboard/starlabs/lite')
| -rw-r--r-- | src/mainboard/starlabs/lite/variants/glk/devicetree.cb | 6 | ||||
| -rw-r--r-- | src/mainboard/starlabs/lite/variants/glkr/devicetree.cb | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb index 6c0269b9e4..c22133b971 100644 --- a/src/mainboard/starlabs/lite/variants/glk/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glk/devicetree.cb @@ -76,15 +76,15 @@ chip soc/intel/apollolake register "sata_ports_enable[0]" = "1" end device ref xhci on - # Motherboard USB Type C + # Motherboard USB 3.0 Type-C register "usb2_port[0]" = "PORT_EN(OC_SKIP)" register "usb3_port[1]" = "PORT_EN(OC_SKIP)" - # Motherboard USB 3.0 + # Motherboard USB 3.0 Type-A register "usb2_port[3]" = "PORT_EN(OC1)" register "usb3_port[0]" = "PORT_EN(OC1)" - # Daughterboard USB 3.0 + # Daughterboard USB 3.0 Type-A register "usb2_port[5]" = "PORT_EN(OC_SKIP)" register "usb3_port[4]" = "PORT_EN(OC_SKIP)" diff --git a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb index bfe9d51a5a..4c79364592 100644 --- a/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb +++ b/src/mainboard/starlabs/lite/variants/glkr/devicetree.cb @@ -76,15 +76,15 @@ chip soc/intel/apollolake register "sata_ports_enable[0]" = "1" end device ref xhci on - # Motherboard USB Type C + # Motherboard USB 3.0 Type-C register "usb2_port[0]" = "PORT_EN(OC1)" register "usb3_port[0]" = "PORT_EN(OC1)" - # Motherboard USB 3.0 + # Motherboard USB 3.0 Type-A register "usb2_port[1]" = "PORT_EN(OC0)" register "usb3_port[1]" = "PORT_EN(OC0)" - # Daughterboard USB 3.0 + # Daughterboard USB 3.0 Type-A register "usb2_port[3]" = "PORT_EN(OC1)" register "usb3_port[4]" = "PORT_EN(OC1)" |