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| author | Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> | 2023-05-25 16:53:44 -0700 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-06-26 17:41:46 +0000 |
| commit | 17e9490e80b2acab61e9937bd6d89bd091c0f81a (patch) | |
| tree | 955e59a2f9c8ae5a0c25b87fc77599a6d01836a1 /src/mainboard/sifive | |
| parent | 4326128fd3bab20782b45fa1fb8e63592d5142db (diff) | |
soc/intel/meteorlake: Add support for crashlog
Capture crashlog records from CPU PUNIT SRAM, SOC PMC SRAM and,
IOE SRAM. Crashlog records for IOE SRAM is discovered by
parsing SOC PMC SRAM records.
BUG=b:262501347
TEST=Able to trigger Crashlog, BERT table gets generated and decodes
as expected.
Change-Id: Ib0abd697fba35edf1c03d2a3a325b7785b985cd5
Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74769
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/mainboard/sifive')
0 files changed, 0 insertions, 0 deletions