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| author | Felix Singer <felix.singer@9elements.com> | 2019-03-13 05:06:06 +0100 |
|---|---|---|
| committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-03-25 17:28:17 +0000 |
| commit | 4e11bff0cfee7e7bd3367099b6daf61f6179043d (patch) | |
| tree | 8ce8718ebca4f06873d4ee036ca58fd33c554e34 /src/mainboard/siemens | |
| parent | 5d1f9a009647c741e8587015b14f1e852e1c489e (diff) | |
soc/apollolake: Add UART0
In my case, on UPsquared board with Celeron N3350 CPU,
I don't have UART2 but UART0.
Change-Id: Id9a742144eba0f1d1544aafecf44d4730d055b4a
Signed-off-by: Felix Singer <felix.singer@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31864
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/siemens')
0 files changed, 0 insertions, 0 deletions