diff options
| author | Werner Zeh <werner.zeh@siemens.com> | 2022-11-07 15:21:40 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-09 14:20:09 +0000 |
| commit | cc7634fd697432ea983ebd1bcf08202a0e8099a8 (patch) | |
| tree | 8169dca44f56a5df12999629a7b51aa911b7b52e /src/mainboard/siemens | |
| parent | eda13db4e93bda57d73a5b71229588238b5e1e1b (diff) | |
mb/siemens/mc_ehl2: Provide I2C timing parameter for SSDT
Provide timing parameter for SSDT generation to achieve the requested
100 kHz speed with a high accuracy.
Test: Measure I2C bus clock, high and low times during I2C access from
Linux and confirm they match the specification.
Change-Id: Ifb6019421b612133b8f25c076519bc0e7200dad8
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/mainboard/siemens')
| -rw-r--r-- | src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb index d5d12777ec..3b54f24896 100644 --- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb +++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb @@ -111,9 +111,21 @@ chip soc/intel/elkhartlake register "common_soc_config" = "{ .i2c[1] = { .speed = I2C_SPEED_STANDARD, + .speed_config[0] = { + .speed = I2C_SPEED_STANDARD, + .scl_hcnt = 0x1e1, + .scl_lcnt = 0x1f4, + .sda_hold = 0x64 + }, }, .i2c[2] = { .speed = I2C_SPEED_STANDARD, + .speed_config[0] = { + .speed = I2C_SPEED_STANDARD, + .scl_hcnt = 0x1df, + .scl_lcnt = 0x1f4, + .sda_hold = 0x64 + }, }, }" |