diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-01-21 17:48:55 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-01-23 14:57:56 +0000 |
| commit | b3f2323e84a8ed47f9cd6aa4d2b885d58da58d97 (patch) | |
| tree | 1574b51da9ceb7b8f453f2d9cb7c77088448b829 /src/mainboard/sapphire | |
| parent | 1a9034cca606ad7e2c1202c190a329bd8821afb4 (diff) | |
mb/*/*/devicetree.cb: Make sandybridge devicetree uniform
This is a merely cosmetic change.
Change-Id: If36419fbee9628b591116604bf32fe00a4f08c17
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/31030
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Tristan Corrick <tristan@corrick.kiwi>
Diffstat (limited to 'src/mainboard/sapphire')
| -rw-r--r-- | src/mainboard/sapphire/pureplatinumh61/devicetree.cb | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb index ed0d997dba..f8cd3b2118 100644 --- a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb +++ b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb @@ -32,8 +32,7 @@ chip northbridge/intel/sandybridge register "gpu_pch_backlight" = "0x00000000" device cpu_cluster 0x0 on chip cpu/intel/socket_LGA1155 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -42,8 +41,7 @@ chip northbridge/intel/sandybridge register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on |