mb/*: Update SPD mapping for sandybridge boards

Boards without HAVE_SPD_IN_CBFS: Move SPD mapping into devicetree.

Boards with HAVE_SPD_IN_CBFS: Convert to Haswell-style SPD mapping.

Change-Id: Id6ac0a36b2fc0b9686f6e875dd020ae8dba72a72
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76967
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>

3 files changed, 8 insertions, 38 deletions

diff --git a/src/mainboard/samsung/lumpy/early_init.c b/src/mainboard/samsung/lumpy/early_init.c
index 495d04eae8..5b355a206b 100644
--- a/src/mainboard/samsung/lumpy/early_init.c
+++ b/src/mainboard/samsung/lumpy/early_init.c
@@ -1,20 +1,16 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/hpet.h>
 #include <stdint.h>
 #include <string.h>
 #include <arch/io.h>
 #include <bootblock_common.h>
-#include <cbfs.h>
 #include <console/console.h>
 #include <bootmode.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <superio/smsc/lpc47n207/lpc47n207.h>
-#include "option_table.h"
 
 void bootblock_mainboard_early_init(void)
 {
@@ -61,12 +57,8 @@ void mainboard_late_rcba_config(void)
 	DIR_ROUTE(D22IR, PIRQA, PIRQB, PIRQC, PIRQD);
 }
 
-static const uint8_t *locate_spd(void)
+static unsigned int get_spd_index(void)
 {
-	typedef const uint8_t spd_blob[256];
-	spd_blob *spd_data;
-	size_t spd_file_len;
-
 	u32 gp_lvl2 = inl(DEFAULT_GPIOBASE + 0x38);
 	u8 gpio33, gpio41, gpio49;
 	gpio33 = (gp_lvl2 >> (33-32)) & 1;
@@ -80,7 +72,7 @@ static const uint8_t *locate_spd(void)
 	printk(BIOS_DEBUG, " - vendor %s\n",
 		gpio49 ? "Samsung" : "Other");
 
-	int spd_index = 0;
+	unsigned int spd_index = 0;
 
 	switch ((gpio49 << 2) | (gpio41 << 1) | gpio33) {
 	case 0: // Other 1G Rev 1
@@ -104,25 +96,16 @@ static const uint8_t *locate_spd(void)
 		spd_index = 5;
 		break;
 	}
-
-	spd_data = cbfs_map("spd.bin", &spd_file_len);
-	if (!spd_data)
-		die("SPD data not found.");
-	if (spd_file_len < (spd_index + 1) * 256)
-		die("Missing SPD data.");
-	return spd_data[spd_index];
+	return spd_index;
 }
 
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	const uint8_t spdaddr[] = {0xa0, 0x00, 0x00, 0x00};
 	const uint8_t tsaddr[] = {0x30, 0x00, 0x00, 0x00};
 
 	/* TODO: Confirm if nortbridge_fill_pei_data() gets .system_type right (should be 0) */
-	memcpy(pei_data->spd_addresses, &spdaddr, sizeof(pei_data->spd_addresses));
 	/* Only this board uses .ts_addresses. Fill here to allow removal from devicetree. */
 	memcpy(pei_data->ts_addresses, &tsaddr, sizeof(pei_data->ts_addresses));
-	memcpy(pei_data->spd_data[2], locate_spd(), 256);
 }
 
 const struct southbridge_usb_port mainboard_usb_ports[] = {
@@ -143,10 +126,9 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
 	{ 0, 0, -1 }, /* P13: Empty */
 };
 
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
+void mb_get_spd_map(struct spd_info *spdi)
 {
-	/* get onboard dimm spd */
-	memcpy(&spd[2], locate_spd(), 256);
-	/* read removable dimm spd */
-	read_spd(&spd[0], 0x50, id_only);
+	spdi->addresses[0] = 0x50;
+	spdi->addresses[2] = SPD_MEMORY_DOWN;
+	spdi->spd_index = get_spd_index();
 }
diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb
index 6847726308..ae3aab5078 100644
--- a/src/mainboard/samsung/stumpy/devicetree.cb
+++ b/src/mainboard/samsung/stumpy/devicetree.cb
@@ -9,6 +9,7 @@ chip northbridge/intel/sandybridge
 	# Enable DVI Hotplug with 6ms pulse
 	register "gpu_dp_b_hotplug" = "0x06"
 
+	register "spd_addresses" = "{0x50, 0, 0x52, 0}"
 	register "max_mem_clock_mhz" = "666"
 
 	register "usb_port_config" = "{
diff --git a/src/mainboard/samsung/stumpy/early_init.c b/src/mainboard/samsung/stumpy/early_init.c
index d4c1cc5166..681373c7d8 100644
--- a/src/mainboard/samsung/stumpy/early_init.c
+++ b/src/mainboard/samsung/stumpy/early_init.c
@@ -1,16 +1,13 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <arch/hpet.h>
 #include <bootblock_common.h>
 #include <stdint.h>
 #include <pc80/mc146818rtc.h>
-#include <console/console.h>
 #include <bootmode.h>
 #include <superio/ite/common/ite.h>
 #include <superio/ite/it8772f/it8772f.h>
 #include <northbridge/intel/sandybridge/sandybridge.h>
 #include <northbridge/intel/sandybridge/raminit.h>
-#include <northbridge/intel/sandybridge/raminit_native.h>
 #include <southbridge/intel/bd82x6x/pch.h>
 #include <southbridge/intel/common/gpio.h>
 #include <superio/smsc/lpc47n207/lpc47n207.h>
@@ -91,19 +88,9 @@ static void setup_sio_gpios(void)
 
 void mainboard_fill_pei_data(struct pei_data *pei_data)
 {
-	const uint8_t spdaddr[] = {0xa0, 0x00, 0xa4, 0x00};
-
-	memcpy(pei_data->spd_addresses, &spdaddr, sizeof(pei_data->spd_addresses));
-
 	/* TODO: Confirm if nortbridge_fill_pei_data() gets .system_type right (should be 0) */
 }
 
-void mainboard_get_spd(spd_raw_data *spd, bool id_only)
-{
-	read_spd(&spd[0], 0x50, id_only);
-	read_spd(&spd[2], 0x52, id_only);
-}
-
 const struct southbridge_usb_port mainboard_usb_ports[] = {
 	/* enabled power  USB oc pin  */
 	{ 1, 1, 0 }, /* P0: Front port  (OC0) */