summaryrefslogtreecommitdiff
path: root/src/mainboard/roda
diff options
context:
space:
mode:
authorSubrata Banik <subrata.banik@intel.com>2017-10-19 16:35:21 +0530
committerAaron Durbin <adurbin@chromium.org>2017-10-19 17:36:06 +0000
commitf506cf0b8dd3914826d55bf7e120f5ed826e438b (patch)
tree08e795734ffb3d7fd2405f629744e05e659ad8ab /src/mainboard/roda
parentb0c4cbb7aff5656a35babe7020c71b45fe3235a6 (diff)
soc/intel/skylake: Use EBDA structure to store soc reserve memory size
Avoid calling calculate_dram_base() function to get chipset reserved memory size during pci resource allocation. Rather use EBDA to store chipset reserved memory size while calling cbmem_top_int(). This patch avoids one extra calculate_dram_base() call. BRANCH=none BUG=b:63974384 TEST=Ensures DRAM based resource allocation has taken care of Intel SoC reserved ranges. Change-Id: I52f359db5a712179d7f2accb4d323d759f3b052b Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22098 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/mainboard/roda')
0 files changed, 0 insertions, 0 deletions