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authorLean Sheng Tan <sheng.tan@9elements.com>2022-06-02 16:53:04 +0200
committerMartin L Roth <gaumless@tutanota.com>2022-06-05 19:52:37 +0000
commit391de94314ff8904e0a1852540d82bfc112d2aae (patch)
treef8230000557b02215db23a98c0495c0e23398621 /src/mainboard/prodrive/atlas
parenta1b3b625839797b0f50af41f8a609d3c2dfa4c91 (diff)
mb/prodrive/atlas: Add display configs for 4 DisplayPorts
Signed-off-by: Lean Sheng Tan <sheng.tan@9elements.com> Change-Id: Iea5312055305bc3354755607a7bfafa7980c6d21 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64900 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
Diffstat (limited to 'src/mainboard/prodrive/atlas')
-rw-r--r--src/mainboard/prodrive/atlas/devicetree.cb8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/prodrive/atlas/devicetree.cb b/src/mainboard/prodrive/atlas/devicetree.cb
index 6dfb8a213d..304fb9a74b 100644
--- a/src/mainboard/prodrive/atlas/devicetree.cb
+++ b/src/mainboard/prodrive/atlas/devicetree.cb
@@ -14,6 +14,14 @@ chip soc/intel/alderlake
# EC memory map range is 0x900-0x9ff
register "gen3_dec" = "0x00fc0901"
+ # Display configuration (4 DPs)
+ register "ddi_ports_config" = "{
+ [DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
+ [DDI_PORT_B] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
+ [DDI_PORT_1] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
+ [DDI_PORT_2] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
+ }"
+
# USB configuration
register "usb2_ports[0]" = "USB2_PORT_MID(OC0)"
register "usb2_ports[1]" = "USB2_PORT_MID(OC0)"