summaryrefslogtreecommitdiff
path: root/src/mainboard/packardbell
diff options
context:
space:
mode:
authorEric Lai <ericr_lai@compal.corp-partner.google.com>2019-12-13 12:31:46 +0800
committerPatrick Georgi <pgeorgi@google.com>2019-12-26 10:51:22 +0000
commit086f0faf756a2d4e71fd9c1d27335af240418b19 (patch)
treed80d93faf567f9cebfbdfe11742c9acd7afb3f58 /src/mainboard/packardbell
parenta8ab2b33a41ac05899885608c6ca9fcd658859b6 (diff)
soc/intel/cannonlake: Move GPIO PM configuration to soc level
Enable GPIO clock gating when enter s0ix/Sx and save the PM bits. Restore the PM bits when exit s0ix/Sx. BUG=b:144002424 TEST=Check GPIO PM bits when enter/exit s0ix are expected Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com> Change-Id: I120f8369b8d3cf7ac821332bdfa124f6ed0570e9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/37685 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/packardbell')
0 files changed, 0 insertions, 0 deletions