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authorElyes Haouas <ehaouas@noos.fr>2024-08-31 10:41:31 +0200
committerElyes Haouas <ehaouas@noos.fr>2024-09-11 01:40:20 +0000
commit83481eb0a30ab69b9b010801fc31812174d3d8bc (patch)
treeb5c685193484088690b461f386fd43117d2dc6d2 /src/mainboard/msi
parent8dfef963fdf0c9362bb8b6712e1e93c75a1db65c (diff)
tree: use boolean for hybrid_storage_mode
Change-Id: I84aad5497d17065f9d42776452f2d2d24cd50a91 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84157 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/mainboard/msi')
-rw-r--r--src/mainboard/msi/ms7d25/devicetree.cb2
-rw-r--r--src/mainboard/msi/ms7e06/devicetree.cb2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/mainboard/msi/ms7d25/devicetree.cb b/src/mainboard/msi/ms7d25/devicetree.cb
index e87467913f..d22cd92a18 100644
--- a/src/mainboard/msi/ms7d25/devicetree.cb
+++ b/src/mainboard/msi/ms7d25/devicetree.cb
@@ -82,7 +82,7 @@ chip soc/intel/alderlake
[DDI_PORT_4] = DDI_ENABLE_HPD,
}"
- register "hybrid_storage_mode" = "1"
+ register "hybrid_storage_mode" = "true"
register "dmi_power_optimize_disable" = "1"
# FIVR configuration
diff --git a/src/mainboard/msi/ms7e06/devicetree.cb b/src/mainboard/msi/ms7e06/devicetree.cb
index 738c8a3030..298e9b01fe 100644
--- a/src/mainboard/msi/ms7e06/devicetree.cb
+++ b/src/mainboard/msi/ms7e06/devicetree.cb
@@ -12,7 +12,7 @@ chip soc/intel/alderlake
register "pmc_gpe0_dw1" = "GPP_VPGIO"
register "pmc_gpe0_dw2" = "GPD"
- register "hybrid_storage_mode" = "1"
+ register "hybrid_storage_mode" = "true"
register "dmi_power_optimize_disable" = "1"
# FIVR configuration