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authorAngel Pons <th3fanbus@gmail.com>2020-02-17 13:08:53 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-15 13:04:20 +0000
commit95de2317c6c6379e43d3b3c27d34eb66198dbe0a (patch)
treee0df0c7dfce199b95609be41f0d806b5829d8005 /src/mainboard/lenovo
parent2aff3005e0ebdf99c0a0f063f023536f601a879b (diff)
nb/intel/nehalem: Rename to ironlake
The code is for Arrandale CPUs, whose System Agent is Ironlake. This change simply replaces `nehalem` with `ironlake` and `NEHALEM` with `IRONLAKE`. The remaining `Nehalem` cases are handled later, as changing some of them would impact the resulting binary. Tested with BUILD_TIMELESS=1 without adding the configuration options into the binary, and packardbell/ms2290 does not change. Change-Id: I8eb96eeb5e69f49150d47793b33e87b650c64acc Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38941 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo')
-rw-r--r--src/mainboard/lenovo/t410/Kconfig2
-rw-r--r--src/mainboard/lenovo/t410/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/t410/dsdt.asl2
-rw-r--r--src/mainboard/lenovo/t410/romstage.c2
-rw-r--r--src/mainboard/lenovo/t410/smihandler.c2
-rw-r--r--src/mainboard/lenovo/x201/Kconfig2
-rw-r--r--src/mainboard/lenovo/x201/devicetree.cb2
-rw-r--r--src/mainboard/lenovo/x201/dsdt.asl2
-rw-r--r--src/mainboard/lenovo/x201/mainboard.c2
-rw-r--r--src/mainboard/lenovo/x201/romstage.c2
-rw-r--r--src/mainboard/lenovo/x201/smihandler.c2
11 files changed, 11 insertions, 11 deletions
diff --git a/src/mainboard/lenovo/t410/Kconfig b/src/mainboard/lenovo/t410/Kconfig
index 5d60565eb5..86cfce8dfc 100644
--- a/src/mainboard/lenovo/t410/Kconfig
+++ b/src/mainboard/lenovo/t410/Kconfig
@@ -3,7 +3,7 @@ if BOARD_LENOVO_T410
config BOARD_SPECIFIC_OPTIONS
def_bool y
select SYSTEM_TYPE_LAPTOP
- select NORTHBRIDGE_INTEL_NEHALEM
+ select NORTHBRIDGE_INTEL_IRONLAKE
select SOUTHBRIDGE_INTEL_IBEXPEAK
select EC_LENOVO_PMH7
select EC_LENOVO_H8
diff --git a/src/mainboard/lenovo/t410/devicetree.cb b/src/mainboard/lenovo/t410/devicetree.cb
index 808e05759e..e18ec385d2 100644
--- a/src/mainboard/lenovo/t410/devicetree.cb
+++ b/src/mainboard/lenovo/t410/devicetree.cb
@@ -15,7 +15,7 @@
## GNU General Public License for more details.
##
-chip northbridge/intel/nehalem
+chip northbridge/intel/ironlake
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
diff --git a/src/mainboard/lenovo/t410/dsdt.asl b/src/mainboard/lenovo/t410/dsdt.asl
index 4f67bd8150..f8e989ad1b 100644
--- a/src/mainboard/lenovo/t410/dsdt.asl
+++ b/src/mainboard/lenovo/t410/dsdt.asl
@@ -45,7 +45,7 @@ DefinitionBlock(
Scope (\_SB) {
Device (PCI0)
{
- #include <northbridge/intel/nehalem/acpi/nehalem.asl>
+ #include <northbridge/intel/ironlake/acpi/ironlake.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
diff --git a/src/mainboard/lenovo/t410/romstage.c b/src/mainboard/lenovo/t410/romstage.c
index 4908ec5e02..f15a919aa7 100644
--- a/src/mainboard/lenovo/t410/romstage.c
+++ b/src/mainboard/lenovo/t410/romstage.c
@@ -20,7 +20,7 @@
#include <device/pci_ops.h>
#include <southbridge/intel/ibexpeak/pch.h>
#include <drivers/lenovo/hybrid_graphics/hybrid_graphics.h>
-#include <northbridge/intel/nehalem/nehalem.h>
+#include <northbridge/intel/ironlake/ironlake.h>
const struct southbridge_usb_port mainboard_usb_ports[] = {
/* Enabled, Current table lookup index, OC map */
diff --git a/src/mainboard/lenovo/t410/smihandler.c b/src/mainboard/lenovo/t410/smihandler.c
index 91cb0ce2d6..70a9e5dd22 100644
--- a/src/mainboard/lenovo/t410/smihandler.c
+++ b/src/mainboard/lenovo/t410/smihandler.c
@@ -19,7 +19,7 @@
#include <cpu/x86/smm.h>
#include <southbridge/intel/ibexpeak/nvs.h>
#include <southbridge/intel/common/pmutil.h>
-#include <northbridge/intel/nehalem/nehalem.h>
+#include <northbridge/intel/ironlake/ironlake.h>
#include <ec/acpi/ec.h>
#include <ec/lenovo/h8/h8.h>
#include <delay.h>
diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig
index a94d24ed75..42cf8f956e 100644
--- a/src/mainboard/lenovo/x201/Kconfig
+++ b/src/mainboard/lenovo/x201/Kconfig
@@ -3,7 +3,7 @@ if BOARD_LENOVO_X201
config BOARD_SPECIFIC_OPTIONS
def_bool y
select SYSTEM_TYPE_LAPTOP
- select NORTHBRIDGE_INTEL_NEHALEM
+ select NORTHBRIDGE_INTEL_IRONLAKE
select SOUTHBRIDGE_INTEL_IBEXPEAK
select EC_LENOVO_PMH7
select EC_LENOVO_H8
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index 7f1f55a25b..d347261330 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -15,7 +15,7 @@
## GNU General Public License for more details.
##
-chip northbridge/intel/nehalem
+chip northbridge/intel/ironlake
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl
index 4f67bd8150..f8e989ad1b 100644
--- a/src/mainboard/lenovo/x201/dsdt.asl
+++ b/src/mainboard/lenovo/x201/dsdt.asl
@@ -45,7 +45,7 @@ DefinitionBlock(
Scope (\_SB) {
Device (PCI0)
{
- #include <northbridge/intel/nehalem/acpi/nehalem.asl>
+ #include <northbridge/intel/ironlake/acpi/ironlake.asl>
#include <southbridge/intel/bd82x6x/acpi/pch.asl>
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c
index 4cd3bdee5f..ebfe7a8bc6 100644
--- a/src/mainboard/lenovo/x201/mainboard.c
+++ b/src/mainboard/lenovo/x201/mainboard.c
@@ -18,7 +18,7 @@
#include <device/device.h>
#include <ec/acpi/ec.h>
-#include <northbridge/intel/nehalem/nehalem.h>
+#include <northbridge/intel/ironlake/ironlake.h>
#include <southbridge/intel/bd82x6x/pch.h>
#include "dock.h"
#include <drivers/intel/gma/int15.h>
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index aec63dbfc9..8bf6f902ca 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -21,7 +21,7 @@
#include <ec/acpi/ec.h>
#include <southbridge/intel/ibexpeak/pch.h>
-#include <northbridge/intel/nehalem/nehalem.h>
+#include <northbridge/intel/ironlake/ironlake.h>
const struct southbridge_usb_port mainboard_usb_ports[] = {
/* Enabled, Current table lookup index, OC map */
diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c
index 91cb0ce2d6..70a9e5dd22 100644
--- a/src/mainboard/lenovo/x201/smihandler.c
+++ b/src/mainboard/lenovo/x201/smihandler.c
@@ -19,7 +19,7 @@
#include <cpu/x86/smm.h>
#include <southbridge/intel/ibexpeak/nvs.h>
#include <southbridge/intel/common/pmutil.h>
-#include <northbridge/intel/nehalem/nehalem.h>
+#include <northbridge/intel/ironlake/ironlake.h>
#include <ec/acpi/ec.h>
#include <ec/lenovo/h8/h8.h>
#include <delay.h>