diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-11-07 08:34:41 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-14 22:34:23 +0000 |
| commit | 62eb94c9d3fe66b8fc0160d4a1290f6223e2f27a (patch) | |
| tree | aa4f37c666f087391d5568a26de16dfb1cf33939 /src/mainboard/lenovo/x201/devicetree.cb | |
| parent | e2949b7c9c2d75589449547387c35dd1f3b11403 (diff) | |
nb/intel/ironlake: Hook up PCI domain and CPU ops to devicetree
Change-Id: I9dd254eddc12966154776d8a2d43f002567e758f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69290
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/lenovo/x201/devicetree.cb')
| -rw-r--r-- | src/mainboard/lenovo/x201/devicetree.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index effe4ef261..73b043720b 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -19,12 +19,14 @@ chip northbridge/intel/ironlake register "gpu_pch_backlight" = "0x061a061a" device cpu_cluster 0 on + ops ironlake_cpu_bus_ops chip cpu/intel/model_2065x device lapic 0 on end end end device domain 0 on + ops ironlake_pci_domain_ops device pci 00.0 on # Host bridge subsystemid 0x17aa 0x2193 end |