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authorNico Huber <nico.h@gmx.de>2020-03-23 01:22:49 +0100
committerMatt DeVillier <matt.devillier@gmail.com>2020-03-29 18:03:30 +0000
commitc2e46420cc934af77391a52e7e5330b5a7e2b1f5 (patch)
tree38eeb0a5b2e6aeb4b2e400ef4adc1edad7069d92 /src/mainboard/lenovo/t440p
parent8107c81e0791897681a2269a2e324fe434713bf8 (diff)
nb/intel/haswell: Implement proper backlight PWM config
Further backport the backlight-PWM handling from Skylake. Beside configuring the PWM frequency in Hz, we also use the PCH's logic for the brightness setting via BLM_PCH_OVERRIDE_ENABLE. Linux would toggle it anyway and that might confuse our ASL code. We assume that the 183Hz value that was set before for Slippy variants was overridden by Linux with the 200Hz VBT value, like it was for the Broadwell Chromebooks. So we set 200Hz for them in the devicetrees. The calculated value for the T440p of 220Hz seems sane and also matches the VBT. Change-Id: I17dfe1a3610d5e2918c617cf5d10896692fdccb3 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39769 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/mainboard/lenovo/t440p')
-rw-r--r--src/mainboard/lenovo/t440p/devicetree.cb3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/mainboard/lenovo/t440p/devicetree.cb b/src/mainboard/lenovo/t440p/devicetree.cb
index 1022e7764e..1f84007ec3 100644
--- a/src/mainboard/lenovo/t440p/devicetree.cb
+++ b/src/mainboard/lenovo/t440p/devicetree.cb
@@ -1,7 +1,6 @@
chip northbridge/intel/haswell
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx.ndid" = "3"
- register "gpu_cpu_backlight" = "0x12ba12ba"
register "gpu_ddi_e_connected" = "1"
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
@@ -12,7 +11,7 @@ chip northbridge/intel/haswell
register "gpu_panel_power_cycle_delay" = "6"
register "gpu_panel_power_down_delay" = "500"
register "gpu_panel_power_up_delay" = "2000"
- register "gpu_pch_backlight" = "0x12ba12ba"
+ register "gpu_pch_backlight_pwm_hz" = "220"
device cpu_cluster 0x0 on
chip cpu/intel/haswell
register "c1_acpower" = "1"