diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-04-06 12:34:56 +1000 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-08 12:10:29 +0200 |
| commit | 708be1a45356b33eaf5f287e529a99fb856736af (patch) | |
| tree | fda08ce63bbc562a98bdfee4774cae7a89143325 /src/mainboard/jetway | |
| parent | 9928197c2678d6b19df40fe0d049f237bc924614 (diff) | |
mainboard/jetway/nf81-t56n-lf: Improve diags in romstage
romstage reports a completely unintelligible printf of "error level:",
fix this and document meaning of the return values in source.
Change-Id: Ia2fb9a6206e08822f6c2f62b69bf22cdae2ba819
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5465
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/mainboard/jetway')
| -rw-r--r-- | src/mainboard/jetway/nf81-t56n-lf/romstage.c | 28 |
1 files changed, 21 insertions, 7 deletions
diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c index 848faf725f..8c05236515 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c +++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c @@ -51,6 +51,20 @@ /* Ensure Super I/O config address (i.e., 0x2e or 0x4e) matches that of devicetree.cb */ #define SERIAL_DEV PNP_DEV(0x2e, F71869AD_SP1) +/* + * Possible AGESA_STATUS values: + * + * 0x0 = AGESA_SUCCESS + * 0x1 = AGESA_UNSUPPORTED + * 0x2 = AGESA_BOUNDS_CHK + * 0x3 = AGESA_ALERT + * 0x4 = AGESA_WARNING + * 0x5 = AGESA_ERROR + * 0x6 = AGESA_CRITICAL + * 0x7 = AGESA_FATAL + */ + + void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; @@ -91,7 +105,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "agesawrapper_amdinitmmio "); val = agesawrapper_amdinitmmio(); if (val) - printk(BIOS_DEBUG, "error level: %x \n", val); + printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val); else printk(BIOS_DEBUG, "passed.\n"); @@ -99,7 +113,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "agesawrapper_amdinitreset "); val = agesawrapper_amdinitreset(); if (val) - printk(BIOS_DEBUG, "error level: %x \n", val); + printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val); else printk(BIOS_DEBUG, "passed.\n"); @@ -107,7 +121,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "agesawrapper_amdinitearly "); val = agesawrapper_amdinitearly (); if (val) - printk(BIOS_DEBUG, "error level: %x \n", val); + printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val); else printk(BIOS_DEBUG, "passed.\n"); @@ -118,7 +132,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "agesawrapper_amdinitpost "); val = agesawrapper_amdinitpost (); if (val) - printk(BIOS_DEBUG, "error level: %x \n", val); + printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val); else printk(BIOS_DEBUG, "passed.\n"); @@ -126,7 +140,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "agesawrapper_amdinitenv "); val = agesawrapper_amdinitenv (); if (val) - printk(BIOS_DEBUG, "error level: %x \n", val); + printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val); else printk(BIOS_DEBUG, "passed.\n"); @@ -138,14 +152,14 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) printk(BIOS_DEBUG, "agesawrapper_amdinitresume "); val = agesawrapper_amdinitresume(); if (val) - printk(BIOS_DEBUG, "error level: %x \n", val); + printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val); else printk(BIOS_DEBUG, "passed.\n"); printk(BIOS_DEBUG, "agesawrapper_amds3laterestore "); val = agesawrapper_amds3laterestore (); if (val) - printk(BIOS_DEBUG, "error level: %x \n", val); + printk(BIOS_DEBUG, "AGESA_STATUS: %x \n", val); else printk(BIOS_DEBUG, "passed.\n"); |