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authorDuncan Laurie <dlaurie@chromium.org>2015-11-05 17:08:25 -0800
committerPatrick Georgi <pgeorgi@google.com>2015-11-11 20:44:10 +0100
commita85f3ae852fcca022fe409fb96bd293ab7a8b9f9 (patch)
tree685f40e5263f467386f83787db939972a1186f22 /src/mainboard/intel/truxton
parent0ca1b2f5475ac1efb3e95d560ba4a6dee415787c (diff)
google/chell: Add SPD for new memory type
This adds the SPD for SK-Hynix H9CCNNNCLTMLAR memory to be used in the EVT build. BUG=chrome-os-partner:47346 BRANCH=none TEST=emerge-chell coreboot Change-Id: I45d0840e43ed81d8286b005f0a99b014b7f0cf28 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1e917440141c586cb370147f9c5b782d6e77ea10 Original-Change-Id: I02f1349f38d83f4a09887adf81384b5a8f475dd0 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/311214 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/12391 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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