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authorBrandon Breitenstein <brandon.breitenstein@intel.com>2020-12-21 14:57:50 -0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-01-14 19:53:31 +0000
commit40b5358c2accfb329b492a1b861b067c8303c6c5 (patch)
treebfe5529fb47b9372dbad9491cb9573ea301d87f4 /src/mainboard/intel/tglrvp
parentbf50c31184d457c24f66b339cd28f84cbdd4177f (diff)
mainboard/volteer: Configure UsbTcPortEn value
The default value is not sufficient to correctly configure the Type-C ports as it has all ports disabled by default. On Volteer ports 0 and 1 are enabled so setting this value to 0x3 and correctly keeping the IomPortPadCfg values at 0 for ports that have a retimer and ports that are not configured. These values were set to 0x90000000 to avoid s0ix issues which arose from the UsbTcPortEn value being incorrect. BUG=b:159151238 BRANCH=firmware-volteer-13672.B TEST=Built image for Voxel and verified that s0ix cycles complete without any issues Change-Id: Ib4f2bd0f68debd4e97ccaab9e1d8a873dc4e4d9f Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48814 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Caveh Jalali <caveh@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/tglrvp')
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