diff options
| author | V Sowmya <v.sowmya@intel.com> | 2020-12-17 08:03:03 +0530 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-12-21 02:36:40 +0000 |
| commit | ce07b5c0ab304b2f13bbebd731dd1a8fc1077446 (patch) | |
| tree | 0af9131f4a65e8b2a37e46bb9d7b21031f15ce1a /src/mainboard/intel/shadowmountain/variants | |
| parent | 04da829a0f4fa997514dc3131251f6f849158131 (diff) | |
mb/intel/shadowmountain: Add Intel Pre-CEP shadowmountain board
This patch adds initial support for Alderlake Intel Pre-CEP
board called shadowmountain.
BUG=b:175808146
TEST=util/abuild/abuild -p none -t intel/shadowmountain -a -c max
Change-Id: I9cb650c88986badd6733b001d6f2a0e338421829
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48685
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel/shadowmountain/variants')
| -rw-r--r-- | src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb new file mode 100644 index 0000000000..fbd7d72f9f --- /dev/null +++ b/src/mainboard/intel/shadowmountain/variants/baseboard/devicetree.cb @@ -0,0 +1,5 @@ +chip soc/intel/alderlake + device cpu_cluster 0 on + device lapic 0 on end + end +end |