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| author | Subrata Banik <subratabanik@google.com> | 2023-12-13 01:08:06 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-15 13:22:53 +0000 |
| commit | 0b7388f0504b9ac849857681ee14c5ff4b2cc73c (patch) | |
| tree | 23018b6289f5380d4ec24762dea399e64e826fe9 /src/mainboard/intel/saddlebrook | |
| parent | 053c901548b751dd10eeae5e0afae8359290bede (diff) | |
soc/intel/cmn/cpu: Introduce API to disable signaling 3-strike event
This patch introduces a new API to disable signaling the 3-strike event
on Intel Meteor Lake C0 (QS) stepping and subsequent SoCs. This is
necessary because the existing event handling mechanism is incompatible
with the new hardware design.
Disabling the 3-strike event registration prevents the 3-strike count
from increasing, which addresses bug b:314883362. This issue can potentially lead to system instability.
BUG=b:314883362
TEST=disabling the 3-strike event on a Google Screebo system with QS silicon.
Change-Id: I15bd5a93da34d7f2a127c21c4cd8b5952926bccf
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79472
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/saddlebrook')
0 files changed, 0 insertions, 0 deletions