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authorFelix Singer <felixsinger@posteo.net>2024-06-23 03:39:24 +0200
committerFelix Singer <felixsinger@posteo.net>2024-06-26 11:44:02 +0000
commitdcddc53fde2d559beef998d3c17e9b7a227e3665 (patch)
treef3061a3764892f73bc5dd827134a795c275b685f /src/mainboard/intel/kunimitsu/devicetree.cb
parent6c83a71b0a803c922b02b613e927d4c49b944c32 (diff)
skl mainboards/dt: Move genx_dec settings into LPC device scope
Change-Id: Iecb4851bedb7c9ed7793763d80acbcbb068e8832 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83172 Reviewed-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm> Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Marvin Evers <marvin.n.evers@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/kunimitsu/devicetree.cb')
-rw-r--r--src/mainboard/intel/kunimitsu/devicetree.cb8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index 45f71030c8..6e08059294 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -13,10 +13,6 @@ chip soc/intel/skylake
register "gpe0_dw1" = "GPP_D"
register "gpe0_dw2" = "GPP_E"
- # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
- register "gen1_dec" = "0x00fc0801"
- register "gen2_dec" = "0x000c0201"
-
# Enable DPTF
register "dptf_enable" = "1"
@@ -235,6 +231,10 @@ chip soc/intel/skylake
device ref emmc on end
device ref sdxc on end
device ref lpc_espi on
+ # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
+ register "gen1_dec" = "0x00fc0801"
+ register "gen2_dec" = "0x000c0201"
+
chip drivers/pc80/tpm
device pnp 0c31.0 on end
end