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authorAngel Pons <th3fanbus@gmail.com>2021-08-29 09:55:43 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-09-06 19:09:27 +0000
commit9e9702188b9d5a43bbda78414b95c0b8953b3020 (patch)
tree643d9dfaa5cca2d2cb5b6daeacb26bbb47aa4269 /src/mainboard/intel/kblrvp
parentf117266986abaac62ccb7218d209650932b26487 (diff)
mb/intel/kblrvp: Disable I2C #4 and #5 on PCH-H
The I2C #4 and I2C #5 devices do not exist on PCH-H. Disable the devices using the PCH-H variants' overridetrees (the base devicetree enables I2C #4), set the `SerialIoDevMode` entries to `PchSerialIoDisabled` and drop inapplicable I2C #4 voltage settings. Change-Id: I56f34fa2004993d2123ccd5c1008fd71682ec2bd Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57226 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/mainboard/intel/kblrvp')
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb7
-rw-r--r--src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb2
2 files changed, 3 insertions, 6 deletions
diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
index bc4a677138..2301f7e346 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb
@@ -72,9 +72,6 @@ chip soc/intel/skylake
register "usb3_ports[8]" = "USB3_PORT_DEFAULT(OC2)" # Stack Conn
register "usb3_ports[9]" = "USB3_PORT_DEFAULT(OC1)" # LAN MAGJACK
-
- register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # I2C4 is 1.8V
-
register "SataSalpSupport" = "1"
register "SataPortsEnable" = "{ \
[0] = 1, \
@@ -91,7 +88,7 @@ chip soc/intel/skylake
[PchSerialIoIndexI2C1] = PchSerialIoPci, \
[PchSerialIoIndexI2C2] = PchSerialIoDisabled, \
[PchSerialIoIndexI2C3] = PchSerialIoDisabled, \
- [PchSerialIoIndexI2C4] = PchSerialIoPci, \
+ [PchSerialIoIndexI2C4] = PchSerialIoDisabled, \
[PchSerialIoIndexI2C5] = PchSerialIoDisabled, \
[PchSerialIoIndexSpi0] = PchSerialIoDisabled, \
[PchSerialIoIndexSpi1] = PchSerialIoDisabled, \
@@ -108,7 +105,7 @@ chip soc/intel/skylake
device domain 0 on
device pci 04.0 off end # SA thermal subsystem
device pci 17.0 on end # SATA
- device pci 19.1 on end # I2C #5
+ device pci 19.2 off end # I2C #4
device pci 1e.1 on end # UART #1
device pci 1e.2 on end # GSPI #0
device pci 1e.3 on end # GSPI #1
diff --git a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
index a76159bec1..17d4486217 100644
--- a/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
+++ b/src/mainboard/intel/kblrvp/variants/rvp8/overridetree.cb
@@ -160,7 +160,7 @@ chip soc/intel/skylake
device domain 0 on
device pci 17.0 on end # SATA
- device pci 19.1 on end # I2C #5
+ device pci 19.2 off end # I2C #4
device pci 1c.0 off end # PCI Express Port 1
device pci 1c.2 on end # PCI Express Port 3
device pci 1c.3 on end # PCI Express Port 4