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authorSubrata Banik <subratabanik@google.com>2023-12-13 01:08:06 +0530
committerFelix Held <felix-coreboot@felixheld.de>2023-12-15 13:22:53 +0000
commit0b7388f0504b9ac849857681ee14c5ff4b2cc73c (patch)
tree23018b6289f5380d4ec24762dea399e64e826fe9 /src/mainboard/intel/kblrvp/ec.h
parent053c901548b751dd10eeae5e0afae8359290bede (diff)
soc/intel/cmn/cpu: Introduce API to disable signaling 3-strike event
This patch introduces a new API to disable signaling the 3-strike event on Intel Meteor Lake C0 (QS) stepping and subsequent SoCs. This is necessary because the existing event handling mechanism is incompatible with the new hardware design. Disabling the 3-strike event registration prevents the 3-strike count from increasing, which addresses bug b:314883362. This issue can potentially lead to system instability. BUG=b:314883362 TEST=disabling the 3-strike event on a Google Screebo system with QS silicon. Change-Id: I15bd5a93da34d7f2a127c21c4cd8b5952926bccf Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79472 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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