diff options
author | Ronak Kanabar <ronak.kanabar@intel.com> | 2020-02-27 19:40:32 +0530 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-25 10:45:08 +0000 |
commit | ba5062d78b8f3453d918a9096f08bfe393fd5922 (patch) | |
tree | 52277b7b8f2c1eb0a8ef1fbe8b575276b131a145 /src/mainboard/intel/jasperlake_rvp/variants/baseboard | |
parent | 2e4bc06b49b413d7524d748cc1626b1737dfd7d1 (diff) |
mb/intel/jasperlake_rvp: Add memory config for Jasper Lake RVP
Add memory initialization parameters for Jasper Lake RVP boards
Jasper Lake RVP supports two variants, one with memory LPDDR4
and another with DDR4
Based on board id, mainboard will pass correct memory parameters
to the fsp.
BUG=None
BRANCH=None
TEST=Check compilation for Jasper Lake RVP and check memory training passes.
Change-Id: Idc92363a2148990df16c2068c7986013d015f604
Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com>
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39195
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/jasperlake_rvp/variants/baseboard')
-rw-r--r-- | src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h b/src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h index 6beef66559..27c645bbde 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/intel/jasperlake_rvp/variants/baseboard/include/baseboard/variants.h @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright 2020 The coreboot project Authors * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -16,14 +17,21 @@ #define __BASEBOARD_VARIANTS_H__ #include <soc/gpio.h> +#include <soc/meminit_jsl.h> #include <stdint.h> #include <vendorcode/google/chromeos/chromeos.h> +enum jsl_board_id { + jsl_ddr4 = 1, + jsl_lpddr4 = 4, +}; + /* The next set of functions return the gpio table and fill in the number of * entries for each table. */ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); const struct cros_gpio *variant_cros_gpios(size_t *num); +const struct mb_cfg *variant_memcfg_config(uint8_t board_id); #endif /*__BASEBOARD_VARIANTS_H__ */ |