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authorKeith Hui <buurin@gmail.com>2024-02-05 19:18:43 -0500
committerMartin L Roth <gaumless@gmail.com>2024-06-08 00:19:23 +0000
commita911b758482025d46e132eeb2ed0279b65692075 (patch)
treefb8475ef03a0365132fefb82bc248468ef0a4784 /src/mainboard/intel/emeraldlake2
parentee126348726b24fbf6e5435bb2cf15417959a8f7 (diff)
mb/*: Remove old USB configurations from SNB/bd82x6x boards
Remove USB configurations and data structures from northbridge devicetree (SNB+MRC boards) and bootblock/romstage C code (native-only SNB boards). All USB configurations are drawn from southbridge devicetree going forward. Change-Id: Ie1cd21077136998a6e90050c95263f2efed68a67 Signed-off-by: Keith Hui <buurin@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81882 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/emeraldlake2')
-rw-r--r--src/mainboard/intel/emeraldlake2/devicetree.cb16
-rw-r--r--src/mainboard/intel/emeraldlake2/early_init.c18
2 files changed, 0 insertions, 34 deletions
diff --git a/src/mainboard/intel/emeraldlake2/devicetree.cb b/src/mainboard/intel/emeraldlake2/devicetree.cb
index 75e6daa1a3..e547ff111f 100644
--- a/src/mainboard/intel/emeraldlake2/devicetree.cb
+++ b/src/mainboard/intel/emeraldlake2/devicetree.cb
@@ -14,22 +14,6 @@ chip northbridge/intel/sandybridge
register "max_mem_clock_mhz" = "800"
register "spd_addresses" = "{0x50, 0, 0x52, 0}"
- register "usb_port_config" = "{
- { 1, 0, 0x0040 },
- { 1, 1, 0x0040 },
- { 1, 0, 0x0040 },
- { 1, 0, 0x0040 },
- { 1, 2, 0x0040 },
- { 0, 0, 0x0000 },
- { 0, 0, 0x0000 },
- { 0, 0, 0x0000 },
- { 1, 4, 0x0040 },
- { 1, 4, 0x0040 },
- { 1, 4, 0x0040 },
- { 0, 4, 0x0000 },
- { 1, 6, 0x0040 },
- { 1, 5, 0x0040 }, }"
-
chip cpu/intel/model_206ax
device cpu_cluster 0 on end
diff --git a/src/mainboard/intel/emeraldlake2/early_init.c b/src/mainboard/intel/emeraldlake2/early_init.c
index 1974713520..329f13d2c1 100644
--- a/src/mainboard/intel/emeraldlake2/early_init.c
+++ b/src/mainboard/intel/emeraldlake2/early_init.c
@@ -47,21 +47,3 @@ void bootblock_mainboard_early_init(void)
void mainboard_fill_pei_data(struct pei_data *pei_data)
{
}
-
-const struct southbridge_usb_port mainboard_usb_ports[] = {
- /* enabled power USB oc pin */
- { 1, 0, 0 }, /* P0: Front port (OC0) */
- { 1, 0, 1 }, /* P1: Back port (OC1) */
- { 1, 0, -1 }, /* P2: MINIPCIE1 (no OC) */
- { 1, 0, -1 }, /* P3: MMC (no OC) */
- { 1, 0, 2 }, /* P4: Front port (OC2) */
- { 0, 0, -1 }, /* P5: Empty */
- { 0, 0, -1 }, /* P6: Empty */
- { 0, 0, -1 }, /* P7: Empty */
- { 1, 0, 4 }, /* P8: Back port (OC4) */
- { 1, 0, -1 }, /* P9: MINIPCIE3 (no OC) */
- { 1, 0, -1 }, /* P10: BLUETOOTH (no OC) */
- { 0, 0, -1 }, /* P11: Empty */
- { 1, 0, 6 }, /* P12: Back port (OC6) */
- { 1, 0, 5 }, /* P13: Back port (OC5) */
-};