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| author | Aamir Bohra <aamir.bohra@intel.com> | 2021-02-25 15:02:35 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-06 06:53:10 +0000 |
| commit | c63a9fb7576e2b457eb2ece83b65f6e037e4ff83 (patch) | |
| tree | 7cab513bdf5a1a88d1beb5895b31711bc23f700c /src/mainboard/intel/dg41wv/cstates.c | |
| parent | 56d51b69cab5b9bfa27ce471ef4ee4ded1e61799 (diff) | |
mb/intel/shadowmountain: Add Cr50 support
This patch includes changes to add Cr50 support over GSPI0.
BUG=b:175579964
TEST=Verify TPM init is done and boots to kernel
Change-Id: I33f7427d1675190f65acf14679be93546e6db69a
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51086
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/intel/dg41wv/cstates.c')
0 files changed, 0 insertions, 0 deletions