diff options
| author | Boris Mittelberg <bmbm@google.com> | 2021-01-27 15:55:01 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-01 08:48:25 +0000 |
| commit | 93df61f3a9371a4b5435400fe7b4e4ea3d43337f (patch) | |
| tree | 0ea1cb46a359968cf99b6c152f7dd576f1e6ec88 /src/mainboard/intel/baskingridge/devicetree.cb | |
| parent | fa21c922c6d963e93db5aeeec77229c4772f33be (diff) | |
mb/google/brya: Change EC -> PCH wake pin to GPP_F17
A new schematic revision indicates that the old wake pin is not used,
and brya will only use 1 IRQ pin from EC, routed to GPP_F17
BUG=b:178605367
TEST=Build test
Signed-off-by: Boris Mittelberg <bmbm@google.com>
Change-Id: Ia2bc5b1562ab30b4461fc7e3b1a4bc3e370db588
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/mainboard/intel/baskingridge/devicetree.cb')
0 files changed, 0 insertions, 0 deletions