diff options
| author | Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> | 2022-01-07 15:57:37 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-21 15:17:55 +0000 |
| commit | dbbb3917008acb7cf0189a85deca47266cb0de89 (patch) | |
| tree | eae7ad2d7ed77546e6f6fc930a7741b62e18b380 /src/mainboard/intel/adlrvp/variants | |
| parent | a6d642fa8da4c723a41ad96b317edd9d8e193460 (diff) | |
mb/intel/adlrvp_n: Update devicetree
Update devicetree according to schematics.
TEST=Build and boot Alder Lake N RVP.
Change-Id: I9faee1cb3539a0246fc6a87e15b3150533de1ee5
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60895
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Usha P <usha.p@intel.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/mainboard/intel/adlrvp/variants')
| -rw-r--r-- | src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb | 16 |
1 files changed, 0 insertions, 16 deletions
diff --git a/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb b/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb index de5471cf65..8a49092613 100644 --- a/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb +++ b/src/mainboard/intel/adlrvp/variants/adlrvp_n_ext_ec/overridetree.cb @@ -5,7 +5,6 @@ chip soc/intel/alderlake chip ec/google/chromeec use conn0 as mux_conn[0] use conn1 as mux_conn[1] - use conn2 as mux_conn[2] device pnp 0c09.0 on end end end @@ -21,10 +20,6 @@ chip soc/intel/alderlake register "desc" = ""TypeC Port 2"" device ref tcss_usb3_port2 on end end - chip drivers/usb/acpi - register "desc" = ""TypeC Port 3"" - device ref tcss_usb3_port3 on end - end end end end @@ -36,24 +31,13 @@ chip soc/intel/alderlake chip drivers/intel/pmc_mux/conn use usb2_port1 as usb2_port use tcss_usb3_port1 as usb3_port - # SBU is fixed, HSL follows CC - register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 0 alias conn0 on end end chip drivers/intel/pmc_mux/conn use usb2_port2 as usb2_port use tcss_usb3_port2 as usb3_port - # SBU is fixed, HSL follows CC - register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" device generic 1 alias conn1 on end end - chip drivers/intel/pmc_mux/conn - use usb2_port3 as usb2_port - use tcss_usb3_port3 as usb3_port - # SBU is fixed, HSL follows CC - register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL" - device generic 2 alias conn2 on end - end end end end |