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authorNico Huber <nico.h@gmx.de>2016-08-11 22:45:55 +0200
committerMartin Roth <martinroth@google.com>2016-08-17 00:27:42 +0200
commitd23ee5de2233d2f200dc15bf4a7669599c2b2014 (patch)
tree1446c7a57813f9ba0782c6199bafbf8392d97ff3 /src/mainboard/hp
parent4f79e6618519fa1aa8e8afaac57fc7dbfeeb4484 (diff)
mainboard: Clean up boot_option/reboot_bits in cmos.layout
Since commit 3bfd7cc (drivers/pc80: Rework normal / fallback selector code) the reboot counter stored in `reboot_bits` isn't reset on a reboot with `boot_option = 1` any more. Hence, with SKIP_MAX_REBOOT_CNT_CLEAR enabled, later stages (e.g. payload, OS) have to clear the counter too, when they want to switch to normal boot. So change the bits to (h)ex instead of (r)eserved. To clarify their meaning, rename `reboot_bits` to `reboot_counter`. Also remove all occurences of the obsolete `last_boot` bit that have sneaked in again since 24391321 (mainboard: Remove last_boot NVRAM option). Change-Id: Ib3fc38115ce951b75374e0d1347798b23db7243c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/16157 Tested-by: build bot (Jenkins) Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-by: York Yang <york.yang@intel.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/mainboard/hp')
-rw-r--r--src/mainboard/hp/abm/cmos.layout2
-rw-r--r--src/mainboard/hp/dl145_g1/cmos.layout2
-rw-r--r--src/mainboard/hp/dl145_g3/cmos.layout2
-rw-r--r--src/mainboard/hp/dl165_g6_fam10/cmos.layout2
-rw-r--r--src/mainboard/hp/pavilion_m6_1035dx/cmos.layout2
5 files changed, 5 insertions, 5 deletions
diff --git a/src/mainboard/hp/abm/cmos.layout b/src/mainboard/hp/abm/cmos.layout
index d83bb14d26..75a2d30eb1 100644
--- a/src/mainboard/hp/abm/cmos.layout
+++ b/src/mainboard/hp/abm/cmos.layout
@@ -18,7 +18,7 @@ entries
0 384 r 0 reserved_memory
384 1 e 4 boot_option
-388 4 r 0 reboot_bits
+388 4 h 0 reboot_counter
392 3 e 5 baud_rate
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
diff --git a/src/mainboard/hp/dl145_g1/cmos.layout b/src/mainboard/hp/dl145_g1/cmos.layout
index 4e081ea1aa..c5db29ca32 100644
--- a/src/mainboard/hp/dl145_g1/cmos.layout
+++ b/src/mainboard/hp/dl145_g1/cmos.layout
@@ -2,7 +2,7 @@ entries
0 384 r 0 reserved_memory
384 1 e 4 boot_option
-388 4 r 0 reboot_bits
+388 4 h 0 reboot_counter
392 3 e 5 baud_rate
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
diff --git a/src/mainboard/hp/dl145_g3/cmos.layout b/src/mainboard/hp/dl145_g3/cmos.layout
index 0ad18a254b..e5964b42f4 100644
--- a/src/mainboard/hp/dl145_g3/cmos.layout
+++ b/src/mainboard/hp/dl145_g3/cmos.layout
@@ -2,7 +2,7 @@ entries
0 384 r 0 reserved_memory
384 1 e 4 boot_option
-388 4 r 0 reboot_bits
+388 4 h 0 reboot_counter
392 3 e 5 baud_rate
395 1 e 1 hw_scrubber
396 1 e 1 interleave_chip_selects
diff --git a/src/mainboard/hp/dl165_g6_fam10/cmos.layout b/src/mainboard/hp/dl165_g6_fam10/cmos.layout
index 5602c70f12..37ab3bd12c 100644
--- a/src/mainboard/hp/dl165_g6_fam10/cmos.layout
+++ b/src/mainboard/hp/dl165_g6_fam10/cmos.layout
@@ -20,7 +20,7 @@ entries
0 384 r 0 reserved_memory
384 1 e 4 boot_option
-388 4 r 0 reboot_bits
+388 4 h 0 reboot_counter
393 3 e 5 baud_rate
396 5 e 10 ecc_scrub_rate
401 1 e 1 interleave_chip_selects
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/cmos.layout b/src/mainboard/hp/pavilion_m6_1035dx/cmos.layout
index 5b1f9cb43b..231572a443 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/cmos.layout
+++ b/src/mainboard/hp/pavilion_m6_1035dx/cmos.layout
@@ -5,7 +5,7 @@ entries
# RTC_BOOT_BYTE (coreboot hardcoded)
0 384 r 0 reserved_memory
384 1 e 4 boot_option
-388 4 r 0 reboot_bits
+388 4 h 0 reboot_counter
# southbridge/amd/agesa/hudson should use this but it doesn't
400 1 e 1 power_on_after_fail