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authorKevin Chang <kevin.chang@lcfc.corp-partner.google.com>2022-03-22 11:22:02 +0800
committerTim Wawrzynczak <twawrzynczak@chromium.org>2022-03-22 05:04:50 +0000
commit1f54599b9875e0de80c8636626bdfbe01646783c (patch)
tree897b5e8b91c30dd0adfaa90106a80815d66e14da /src/mainboard/hp/folio_9480m
parent6e52c1da4a2245a7499530ea0943fa002ed8aa5e (diff)
mb/google/brya/var/taeko: Disable GL9763e PCIE port L0s
GL9763e doesn’t support L0s state, so disable L0s at the root port. BUG=b:220079865 TEST=Build FW and run stress exceed 2500 cycles. Signed-off-by: Kevin Chang <kevin.chang@lcfc.corp-partner.google.com> Change-Id: I6ed790c833d1c01a30aed0fd09cac260a3837ead Reviewed-on: https://review.coreboot.org/c/coreboot/+/62973 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Peichao Wang <pwang12@lenovo.corp-partner.google.com>
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